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Analog Evaluation, (Analogue Evaluation)
a hypothetical dedicated special purpose hardware to evaluate a chess position using analog circuits such as resistive networks, operational amplifier (op-amps), and in particular the analogous FPGA counterparts FPAA, to map digital or discrete input signals, representing the board or aspects of the board, to an analog output representing an evaluation score along with some noise as input of an analog-to-digital converter. Jonathan Allen, Edward Hamilton, and Robert Levinson mentioned a method to convert a chess mobility graph to a resistive network which could be computed using the residual resistance property of interconnected chips within their Morph III project [1]. Using memristors, memistors, or even a kind of motorized potentiometers [2] as used in closed loop control and servomechanisms, would allow the implementation of physical neural networks as analog evaluation device with machine learning features [3].
Summing amplifier [4]

Summing Amplifier

A summing amplifier using an operational amplifier with feedback resistor Rf sums several (weighted by input resistors 1..n) voltages to an negated output ...


... and may be used to implement a classical evaluation function as linear combination of independent features (F) and associated weights (W):


See also


Publications


Forum Posts


External Links


References

  1. ^ Jonathan Allen, Edward Hamilton, Robert Levinson (1997). New Advances in Adaptive Pattern-Oriented Chess. Advances in Computer Chess 8
  2. ^ Motorized potentiometers for high precision proportional controls
  3. ^ SciDAC Review - HARDWARE: Cortical Computing with Memristive Nanodevices
  4. ^ A circuit diagram of a Summing amplifier made using an operational amplifier, made by Inductiveload, January 26 2009, Wikimedia Commons
  5. ^ Rätsel - Wiikipedia.de (German) » Riddle from Wikipedia

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