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Cray T3E,
Cray Research's second-generation massively parallel supercomputer architecture, launched in 1995 as successor of the T3D. The T3E is a scalable distributed NUMA architecture containing up to 2176 processing element (PE) nodes of initially 300 MHz DEC Alpha 21164 processor with 64 MiB to 2 GiB of DRAM interconnected as a 3D torus, so that each processor can access the memory of every other processor. Later models consists of faster Alpha 21164A and 21264 processors.
Cray T3E processor board [1]

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  1. ^ Processor board of a CRAY T3E-136/ac (=air-cooled) massive parallel computer (operational ca. 1997-2005). The related system had 136 processors in total. This board has four Dec-Alpha EV5 processors (300 MHz) with local memory chips and router chips onboard. Alpha processors were superscalar with two floating point operations per cycle. Authors: Hannes Grobe & Chresten Wübber, Alfred Wegener Institute for Polar and Marine Research, Bremerhaven, Germany, August 08 2006, CC-BY-SA-2.5, Cray T3E from Wikipedia, Alpha 21164 from Wikipedia

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