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a family of 64-bit microprocessors by Intel that implement the IA-64 architecture originated by Hewlett-Packard (HP) and later jointly developed by HP and Intel. While the early development started in 1989 by HP, Intel officially announced the name of the processor, Itanium, on October 4, 1999 [1]. The Itanium Merced was released on June 2001, Itanium 2 McKinley and Madison in 2002 and 2003 respectively, the so far most recent Poulson (Itanium 9500) in November 2012, and Kittson planned for 2015 [2]. Initially intended as Intel's successor for x86 aka IA-32 architecture, AMD forced Intel to change priorities with x86-64.
Die shot of Itanium 9500 [3]


IA-64 applies explicitly parallel instruction computing (EPIC) which allows the processor to execute multiple instructions in each clock cycle. EPIC implements a form of very long instruction word (VLIW) architecture, in which a single instruction word contains up to three instructions. With EPIC, the compiler determines in advance which instructions can be executed at the same time, rather than the processor itself. The architecture implements branch predication and speculation, has 128 64-bit general purpose registers, 128 82-bit floating point or SIMD registers, 64 one-bit predicates, and eight branch registers, and thirty functional execution units in eleven groups, such as various ALUs, SIMD units with parallel shift and multiply, and population count unit.

Itanium architecture [4]

x86 Support

x86 (IA-32) instructions were supported by hardware [5] , and since 2006 emulated with the IA-32 Execution Layer.

Chess Programs

TCSP [6] , Tinker [7] and Crafty were mentioned running under Itanium. While the original Merced was disappointing, Robert Hyatt reported a good performance of Crafty on McKinley in 2003 [8] , close to the Opteron with double frequency. Eugene Nalimov, at that time member of the Microsoft Visual compiler team targeting the Itanium platform, provided a IA-64 optimzed BitScan aka firstOne and lastOne in C [9] , taking advantage of IA-64's branch predication.

See also

Forum Posts

External Links


  1. ^ Intel names Merced chip Itanium - CNET News by Michael Kanellos, CNET News, October 4, 1999
  2. ^ Itanium from Wikipedia
  3. ^ Intel's Next Generation Itanium 'Kittson' IA64 Processor Detailed - 32nm Process, 9300/9500 Socket Compatible by Usman Pirzada, April 2015
  4. ^ Diagram of the architecture of the Itanium (IA-64) 64-bit Intel microprocessor, Image by Fred the Oyster, September 08, 2014, Wikimedia Commons, IA-64 from Wikipedia, CC BY-SA 4.0
  5. ^ Re: Deep-Fritz 18 on a 64 cpu itanium (intel not AMD) system by Eugene Nalimov, CCC, January 16, 2003
  6. ^ Re: Question: Itanium Info by K. Burcham, CCC, December 08, 2003
  7. ^ Itanium2 Testing Crafty & Tinker Informal Results by Brian Richardson, CCC, February 16, 2003
  8. ^ Re: Question: Itanium Info by Robert Hyatt, CCC, December 09, 2003
  9. ^ Re: Will the Itanium have a BSF or BSR instruction? by Eugene Nalimov, CCC, August 16, 2000

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