UNIVAC+418

a [|transistorized], [|18-bit] mainframe computer system by [|Sperry UNIVAC], first delivered as UNIVAC **418-I** in June 1963, available with 4 to 16 KiWords of core memory with 4 μs cycle time, also available as [|militarized version] UNIVAC **1218**. The **418-II** in November 1964 with up to 64 KiWords cut the cycle time to 2 μs and the **418-III** came in 1969 with up to 128 KiWords further reduced to 750 ns memory cycles. The 418 used [|ones' complement] integer arithmetic with single or double precision (36-bit) operands. The 36-bit [|accumulator] (A) was therefor divided by two upper and lower 18-bit AU and AL registers. A 3-bit index control register (ICR) controls the storing and loading of one flip-flop type B-register to and from eight main memory locations reserved as [|index registers] (IR). Further, a 6-bit special register is a memory base register for some instructions, completed by the 17-bit instruction address register (IAR). All registers were displayed as [|binaries] on the [|front panel] in realtime with the ability to enter new values via buttons in a special mode. The UNIVAC **418-III** had optional 36-bit [|floating-point] support (1:8:27) and optional binary/decimal conversion instructions. || toc =Chess Programs=
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 * [[image:univac-418.jpg link="https://zerogees.wordpress.com/2015/12/06/univac-418-paddington/univac-418/"]] ||~ || **UNIVAC 418**,
 * UNIVAC 418 ||~ ||^ ||
 * IGM
 * Schach

=See also=
 * UNIVAC 494
 * UNIVAC 1100

=Manuals=
 * [|UNIVAC 418-III System Description 1969] (pdf)
 * [|UNIVAC 418-III RTOS Assembler] (pdf)

=External Links=
 * [|UNIVAC 418 from Wikipedia]
 * [|The UNIVAC 418 Computer - Folklore] by George Gray

=References= =What links here?= include page="UNIVAC 418" component="backlinks" limit="40"
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