Marc+Boulé

a Canadian electrical engineer and computer scientist. He holds a Ph.D. Thesis //Assertion-Checker Synthesis for Hardware Verification// (2008) and a Masters thesis on //FPGA Move Generation for the Game of Chess// (2003) from McGill University under supervision of Zeljko Zilic and Monty Newborn. Marc Boulé is now at [|ETS], [|Montréal]. Marc Boulé's thesis move generator was used in his own chess program MBChess. || toc =Selected Publications=
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 * [[image:MarcBoule.JPG link="http://www.iml.ece.mcgill.ca/%7Emboule/?q=node/3"]] ||~  || **Marc Boulé**,
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 * Marc Boulé (**2002**). //An FPGA Move Generator for the Game of Chess//. Masters thesis, McGill University, Montréal, supervisor: Zeljko Zilic, co-supervisor: Monty Newborn
 * Marc Boulé, Zeljko Zilic (**2002**). //An FPGA Move Generator for the Game of Chess//. McGill University
 * Marc Boulé, Zeljko Zilic (**2002**). //An FPGA Move Generator for the Game of Chess//. ICGA Journal, Vol. 25, No. 2
 * Marc Boulé, Zeljko Zilic (**2003**). //FPGA Hardware Acceleration: From Chess Playing to Automated Theorem Proving//. poster presentation, Micronet 2003, Toronto, Sept. 2003.
 * Marc Boulé (**2008**). //Assertion-Checker Synthesis for Hardware Verification, In-Circuit Debugging and On-Line Monitoring//. Ph.D. thesis, McGill University, supervisor: Zeljko Zilic

=Forum Posts=
 * [|A Response From Marc Boule] by Slater Wold, CCC, April 02, 2002
 * [|Re: Thesis by Marc Boule] by Marc Boulé, CCC, September 07, 2002
 * [|Re: Attention - Slater Wold] by Marc Boulé, CCC, April 10, 2003

=External Links=
 * [|Marc Boulé's Web Page]
 * [|Marc Boulé, ing., Ph.D. - Maître d'enseignement]
 * [|Marc Boulé - Canada | LinkedIn]

=References= =What links here?= include page="Marc Boulé" component="backlinks" limit="40"
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