Berkeley+Chess+Microprocessor

a chess microprocessor developed by James Testa and Alvin M. Despain at University of California, Berkeley, introduced in May 1990 at the //Custom Integrated Circuits Conference// , also mentioned in Marc Boulé's 2002 thesis.
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 * [[image:CampanileMtTamalpiasSunset-original.jpg width="198" height="264" link="http://en.wikipedia.org/wiki/File:CampanileMtTamalpiasSunset-original.jpg"]] ||~  || **Berkeley Chess Microprocessor**, (BCM)

The BCM was a 200,000 [|transistor] VLSI chip, 1.2 [|micron] [|CMOS] [|die], 11 mm by 9 mm in area, able to generate three million legal moves per second. The chip incorporates a move generator, a basic positional evaluator and search control, can detect pins and X-ray attacks, and has an ALU for each square to sum the values of attacking pieces to perform a kind of parallel SEE for move ordering and evaluation purposes such as mobility and square control. || toc =Move Generation= While the move generation design is similar to Belle's, legal move generation in hardware was already designed by Alvin Despain in the 70s, as described by Ozalp Babaoglu in his 1977 thesis, but as noted by Joe Condon and Ken Thompson, never obtained funding for full construction. Both, attackers and victims, emit signals in all directions simultaneously so that it is a matter of combinatorial logic in the square receivers to detect pins. Find victim and find attacker cycles use programmable priority arbiters for move ordering during full width as well as quiescence search. A 25–level ply stack to enable or disable origin- and target squares keeps track of the move generation stage, and controls which move is generated next. This is how the bookkeeping works in sequential C like pseudo code with Bitboards (omitting legal move logic): code format="cpp" disable[ply] = depth <= 0 ? emptySquares : 0; /* enable to-squares */ while ( ( to = findMVV(disable[ply])) >= 0 ) { disable[ply] &= ~ownPieces; /* enable all possible from-squares */ while ( ( from = findLVA(disable[ply])) >= 0 ) { make(from, to);           /* ply++ */ ....   unmake(from, to);          /* ply-- */ disable[ply] |= 1 << from; /* disable from-square */ } disable[ply] |= 1 << to;     /* disable to-square */ } code
 * [|The Campanile], UC Berkeley ||~  ||^   ||

=Zerker= The Berkeley Chess Microprocessor lacked participation in computer chess competitions. A chess entity of BCM's co-author James Testa dubbed Zerker was registered for the ACM 1990 tournament, noted as promising newcomer, as it reported 7,000,000 moves per second, roughly three times faster than Deep Thought at that time. Unfortunately, a damage to the machine during shipment from California forced its withdrawal, and it seems the project was later abandoned.

=See also=
 * Belle
 * CHEOPS
 * Zerker

=Publications=
 * Ozalp Babaoglu (**1977**). //Hardware implementation of the legal move generation and relative ordering functions for the game of chess//. Master's thesis, University of California, Berkeley
 * James Testa, Alvin M. Despain (**1990**). //[|A CMOS VLSI chess microprocessor]//. University of California, Berkeley, IEEE Custom Integrated Circuit Conference
 * Marc Boulé (**2002**). //An FPGA Move Generator for the Game of Chess//. Masters thesis, McGill University, (Supervisor: Zeljko Zilic, Co-Supervisor: Monty Newborn), [|pdf]

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