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ARM6
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*
Hardware
* ARM6
ARM6
, (ARM610, ARM7)
a family of 32-bit
RISC
processors of the
ARMv3 architecture
released in early 1992 by
Advanced RISC Machines Ltd
, a company structured as a joint venture between
Acorn Computers Ltd
,
Apple
and
VLSI Technology
, which became
ARM Ltd
when its parent company,
ARM Holdings
, floated on the
London Stock Exchange
and
NASDAQ
in 1998
[1]
. The ARM6 is instruction compatible to Acorn's
ARM2
, has a full 32-bit address bus, requiring an extra PSR register. The differences between ARM6 and the later ARM7 are that the latter has a hardware debug capability, the
Thumb instruction set
to support both 16-bit and 32-bit instruction formats and an enhanced multiplier
[2]
. The ARM6 and successors were used in various
Dedicated Chess Computers
, notably the
RISC 2500
,
Mephisto Montreux
,
Tasc R30
and
Tasc R40
.
ARM610
die
[3]
Table of Contents
See also
Manuals
Publications
External Links
References
What links here?
See also
ARM2
ARM11
Manuals
ARM® and Thumb®-2 Instruction Set Quick Reference Card
(pdf)
ARM Assembly Language Programming
by
Pete Cockerell
Publications
Anthony Fox
(
2003
).
Formal Specification and Verification of ARM6
.
LNCS
, Vol. 2758, Theorem Proving in Higher Order Logics,
Springer
[4]
Michael J. C. Gordon
(
2004
).
Formal Specification and Verification of ARM6
. Computer Laboratory,
University of Cambridge
,
Final Report as pdf
External Links
Apple, DEC, Intel, Marvell: ARM6, StrongARM, XScale - Wikipedia
ARMwiki
ARM Assembler
Instruction set quick finder
Important ARM History and Dates
Differences Between ARM6 and Earlier ARM Processors
(
Wayback Machine
)
ARM
from
Schachcomputer.info Wiki
RISC OS from Wikipedia
ARM Hardware Overview
ARM Information Center
ARM’s Race to Embedded World Domination
by
Paul DeMone
,
Real World Tech
, November 9, 2000
Formal Specification and Verification of ARM6
-
University of Cambridge
References
^
Apple, DEC, Intel, Marvell: ARM6, StrongARM, XScale - Wikipedia
^
Michael J. C. Gordon
(
2004
).
Formal Specification and Verification of ARM6
. Computer Laboratory,
University of Cambridge
,
Final Report as pdf
^
Die
shot of ARM610 microprocessor made by
GEC Plessey Semiconductors
, Photo by
Pauli Rautakorpi
, June 13, 2014
^
HOL (proof assistant) from Wikipedia
What links here?
Page
Date Edited
ARM2
Dec 16, 2016
ARM6
Jan 26, 2015
Hardware
Jan 20, 2018
Mephisto Montreux
Jan 8, 2016
RISC 2500
Jan 7, 2016
Tasc R30
Sep 7, 2017
Tasc R40
Sep 7, 2017
The King
Jan 21, 2018
WMCCC 1993
Dec 30, 2017
WMCCC 1995
Jan 3, 2018
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a family of 32-bit RISC processors of the ARMv3 architecture released in early 1992 by Advanced RISC Machines Ltd, a company structured as a joint venture between Acorn Computers Ltd, Apple and VLSI Technology, which became ARM Ltd when its parent company, ARM Holdings, floated on the London Stock Exchange and NASDAQ in 1998 [1]. The ARM6 is instruction compatible to Acorn's ARM2, has a full 32-bit address bus, requiring an extra PSR register. The differences between ARM6 and the later ARM7 are that the latter has a hardware debug capability, the Thumb instruction set to support both 16-bit and 32-bit instruction formats and an enhanced multiplier [2]. The ARM6 and successors were used in various Dedicated Chess Computers, notably the RISC 2500, Mephisto Montreux, Tasc R30 and Tasc R40.
Table of Contents
See also
Manuals
Publications
External Links
References
What links here?
Up one Level