HP 2100,
a series of 16-bit minicomputers by Hewlett-Packard (HP) starting with the HP 2116A in 1966 as a controller for HP's programmable instruments with 16 empty card slots for interface cards [1], with 4 kibi words of core memory (expandable to 8, HP 2116B added support for up to 32 kibi words in 1968) and hardwired CPU. The HP 2115A in 1967 was a cost-reduced variant of the 2116A with only 8 card slots.
The smallest unit of memory was a 16-bit word with up to 32 kibi words addressable. The ALU had two accumulators, A and B, and a 15-bit program counter P. Since most instructions were word wide, a memory operand could not specified by full 15-bits. Instead, 10-bits were used as page offset of a 1 kibi word page, plus one page indicator bit, to either use the page zero, or the so called current page determined by the five leading bits of the program counter. Indirect addressing was used to implement none reentrantprocedure call and return. The first word of a procedure was reserved for the return address, and the jump to subroutine (JSB) instruction would store the return address there. The return to caller was performed via a jump indirect through that word [2]. The second generation HP 2100A and 2100S build from 1970 until 1974 had a microprogrammed CPU.
In 1969, HP introduced its bundled HP time-shared BASIC (TSB) systems starting with the HP 2000A based on a dual processor 2116B running a multi-userBasic interpreter. Subsequent models with faster execution and expanded memory and peripherals included the HP 2000B in 1970, HP 2000C and HP 2000E in 1971. Depending on the hardware configuration, the system supports up to 16 or up to 32 simultaneous remote users. The typical terminal for a TSB system was a Teletype Model 33 ASR connected directly to the I/O processor or through a modem or acoustic coupler.
a series of 16-bit minicomputers by Hewlett-Packard (HP) starting with the HP 2116A in 1966 as a controller for HP's programmable instruments with 16 empty card slots for interface cards [1], with 4 kibi words of core memory (expandable to 8, HP 2116B added support for up to 32 kibi words in 1968) and hardwired CPU. The HP 2115A in 1967 was a cost-reduced variant of the 2116A with only 8 card slots.
The smallest unit of memory was a 16-bit word with up to 32 kibi words addressable. The ALU had two accumulators, A and B, and a 15-bit program counter P. Since most instructions were word wide, a memory operand could not specified by full 15-bits. Instead, 10-bits were used as page offset of a 1 kibi word page, plus one page indicator bit, to either use the page zero, or the so called current page determined by the five leading bits of the program counter. Indirect addressing was used to implement none reentrant procedure call and return. The first word of a procedure was reserved for the return address, and the jump to subroutine (JSB) instruction would store the return address there. The return to caller was performed via a jump indirect through that word [2]. The second generation HP 2100A and 2100S build from 1970 until 1974 had a microprogrammed CPU.
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HP 2000
In 1969, HP introduced its bundled HP time-shared BASIC (TSB) systems starting with the HP 2000A based on a dual processor 2116B running a multi-user Basic interpreter. Subsequent models with faster execution and expanded memory and peripherals included the HP 2000B in 1970, HP 2000C and HP 2000E in 1971. Depending on the hardware configuration, the system supports up to 16 or up to 32 simultaneous remote users. The typical terminal for a TSB system was a Teletype Model 33 ASR connected directly to the I/O processor or through a modem or acoustic coupler.Chess Programs
See also
External Links
History of the 2116A digital computer, 1969
Hewlett Packard 2116A 50th Birthday, YouTube Video
References
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