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6502

GerdIsenberg — Mon, 25 Dec 2017 16:49:25 GMT

Home * Hardware * 6502

		The 6502 is an 8-bit microprocessor that was designed by Chuck Peddle and Bill Mensch for MOS Technology in 1975. Peddle and Mensch were previously involved in designing the Motorola 6800. The 6502's performance was actually competitive with other CPUs using significantly faster clocks, partly due to a simplistic state machine implemented by combinatorial logic to a greater extent than in many other designs. Therefor it was a popular processor for dedicated chess computers as well as general purpose systems such as the single board computer KIM-1, and early home computers, notably Apple II, Atari 8-bit, Commodore PET and Commodore 64, which actually uses a close derivative of the 6502, the 6510.
6502 surface ^[1]

Selected Publications

Register Files

Like its precursor, the Motorola 6800 (but unlike Intel 8080) the 6502 has very few registers. There was one 8-bit accumulator register (A), two 8-bit index registers (X and Y), an 8-bit processor status register (P), an 8-bit stack pointer (S), and a 16-bit program counter (PC).

Endianess

Unlike Motorola 6800, the 6502 is a little-endian processor, concerning the byte-order of 16-bit words in memory.

Quotes

By Dan and Kathe Spracklen from their Oral History ^[2] on the advantages of the 6502 compared to 8080/Z80 while porting Sargon:

Danny Spracklen: Yes, the instruction set was a little more efficient, I think, and more- it was more, if
you could say, RISC like. ...

It was a simpler instruction set, but it actually- the cycle times on the individual instructions were very fast, like one microsecond, instead of like 4 or 5 microseconds, on the Z-80.

Kathleen Spracklen: Yes. And it had the short branch. You can’t underestimate the value that the short branch offered. They had the ability- if you could branch within a one byte distance of where you were, and using it as a sign number, positive or negative, you had an extremely fast branching instruction. So if you could make loops very, very small and tight, you could really run with high, high speed.

Architecture

MC650x Internal Architecture ^[3]

TK20

		The TurboKit TK20 by German engineering company Schaetzle+Bsteh was a discrete 6502 compatible 18 MHz high speed CPU with own fast shadow memory build from more than 100 integrated circuits, dedicated for general purpose and chess computers with 6502 processor, connected via a ribbon cable to the 40 pin processor socket of the host system ^[4] ^[5] ^[6]. The TK 20 was used by Ed Schröder with his dedicated Rebel programs at the WCCC 1986 and various World Microcomputer Chess Championship, and also by Ulf Rathsman and his Y! programs. Further, the dedicated Saitek Leonardo Turbo mini series was extended by Schaetzle+Bsteh with an 18 MHz integrated TurboKit ^[7].
TK20 ^[8]

Manuals

6502 Programming Manual, August 1976 (pdf)

Selected Publications

^[9]

Peter Jennings (1976). MicroChess, a Chess playing program for the 6502 Microcomputer. pdf, Courtesy of Peter Jennings, The Computer History Museum
For instance, how to flip the board in 6502 Assembly ^[10] :
Lance A. Leventhal (1979). 6502 Assembly Language Programming. Osborne/McGraw-Hill, pdf
Editor (1981). Battle of the Chips. Personal Computing, Vol. 5, No. 1, pp. 82 » [Z80
Rodnay Zaks (1983). Programming the 6502 (Fourth Edition). Sybex, Inc. ISBN 0-89588-135-7.

Forum Posts

Retrocomputing with the 6502 by Steven Edwards, CCC, June 22, 2007
Vintage Chess Programming by Srdja Matovic, CCC, October 08, 2011
My Arduino-Based 6502 Simulation/Emulation...thing? by halkun, 6502.org Forum, November 26, 2012 » Arduino

External Links

MOS Technology 6502 from Wikipedia
6502 Assembly - Wikibooks
6502.org: The 6502 Microprocessor Resource
6502.org Forum
Visual6502.org
NMOS 6502 ALU from Dieter's Homepage
Wieder lieferbar: der 6502-Mikroprozessor from heise online, January 25, 2012 (German)

References

^ Images of the 6502 from Visual6502.org
^ Gardner Hendrie (2005). Oral History of Kathe and Dan Spracklen. pdf from The Computer History Museum
^ Foltyn Presentation - Microprocessor 6502
^ TurboKit – Schachcomputer.info Wiki
^ Schaetzle+Bsteh High Speed Processor System TK20 TurboKit MTK20 Multi TurboKit. pdf hosted by Hein Veldhuis
^ TK20 Turbokit by Chessbama, Hiarcs Forum, December 09, 2014
^ Saitek Leonardo TurboKit from Schachcomputer.info Wiki (German)
^ Image from ICT 2006 and 13th Chess Computer Users (Gebruikers) tournament old CSVN site Photo Gallery 24, Photos by Eric van Reem and Kees Sio
^ 6502.org: Books
^ 6502 MICROPROCESSOR Instruction Set Summary

What links here?

Page	Date Edited
1st Computer Olympiad	Jul 25, 2017
6502	Dec 25, 2017
6800	Jun 23, 2017
8080	Sep 3, 2017
ACM 1979	Apr 3, 2017
ACM 1980	Dec 25, 2017
ACM 1981	Jan 19, 2018
ACM 1982	Jul 19, 2016
ACM 1984	Jul 19, 2016
ACM 1985	Jun 21, 2017
ACM 1986	Dec 5, 2017
ACM 1987	Dec 5, 2017
ACM 1988	Dec 5, 2017
ACM 1989	Jun 7, 2016
Acorn Atom	Dec 11, 2016
Acornsoft Chess	Dec 11, 2016
Advance	Jan 7, 2016
Amateur	Feb 25, 2012
Anthony Adam	Aug 3, 2016
Apple II	Dec 22, 2017
Applied Concepts	Dec 25, 2017
Arduino	Feb 21, 2018
Artic Computing	Aug 13, 2016
Assembly	Sep 3, 2017
Atari 8-bit	Aug 3, 2016
Attila Kovács	Jan 7, 2016
BBC Micro	Dec 16, 2016
Bogol	Jan 2, 2017
Canadian Computer Chess Invitational Championship 1984	Mar 2, 2013
Chafitz	Dec 25, 2017
Chafitz ARB Sargon 2.5	Sep 9, 2017
Chafitz Modular Game System	Dec 25, 2017
Chess (David Thompson)	Dec 11, 2016
Chess (Program)	Dec 22, 2017
Chess 7.0	Jul 13, 2015
Chess Challenger	Dec 27, 2017
Chess Champion Mark IV	Dec 9, 2012
Chess Champion Mark V	Sep 7, 2017
Chess Champion MK II	Jul 30, 2015
Chess Champion Super System III	Sep 17, 2015
Chess Monster	Jun 21, 2017
Chessmaster	Jan 21, 2018
Chessmate	Dec 12, 2016
Chessnut	Dec 10, 2016
Color Flipping	May 17, 2017
Colossus Chess	Dec 10, 2017
Commodore 128	Mar 24, 2016
Commodore 64	Oct 27, 2016
Commodore ChessMate	Jan 26, 2016
Computerworld	Sep 9, 2017
Conchess	Sep 4, 2017
Conic X	Jan 8, 2016
Constellation	Oct 2, 2016
Craig Barnes	Jan 8, 2016
Craig S. Bruce	Apr 14, 2014
CXG Sphinx	Jun 23, 2017
Cyrus	Jul 22, 2014
Dan Spracklen	Jan 17, 2017
David Broughton	Jan 7, 2016
Denis Dancanet	Feb 6, 2018
DOCCC 1981	Nov 14, 2015
DOCCC 1982	Nov 14, 2015
DOCCC 1983	Nov 13, 2015
DOCCC 1984	May 22, 2016
DOCCC 1985	Dec 9, 2016
DOCCC 1986	Dec 9, 2016
DOCCC 1987	Dec 9, 2016
Elegance	Jan 8, 2016
Elite	Oct 1, 2016
Excellence	Mar 23, 2014
Fafner	Jan 8, 2016
Fidelity	Jan 7, 2016
Fidelity Electronics	Dec 1, 2017
Fidelity Phantom	Dec 1, 2017
Frans Morsch	Jun 23, 2017
Gedeon	Jan 8, 2016
Gideon	Feb 26, 2018
Great Game Machine	Dec 20, 2017
Happy-Chess	Dec 1, 2012
Hardware	Jan 20, 2018
Harm Geert Muller	Mar 31, 2018
Hypra-Chess	Oct 28, 2017
Intelligent Chess	Apr 14, 2013
Intelligent Chess Software	Jan 8, 2016
John F. White	Dec 11, 2013
Kallisto	Oct 28, 2017
Kathe Spracklen	Dec 25, 2017
Kempelen	Mar 24, 2016
KIM-1	Oct 9, 2014
Knowledge	Jul 22, 2017
Larry Atkin	Jan 7, 2016
Lars Hjörth	Sep 5, 2017
Lucien N. Dancanet	Feb 6, 2018
Mark Taylor	Jan 7, 2016
Martin Bryant	Dec 11, 2016
Master Chess	Aug 3, 2016
Max	Dec 23, 2017
MCC 1980	Dec 27, 2017
Mephisto MM II	Sep 1, 2017
Mephisto MM IV	Sep 1, 2017
Mephisto MM V	Sep 1, 2017
Mephisto Mondial	Jun 23, 2017
Mephisto Polgar	Sep 1, 2017
Mephisto Rebell	Sep 1, 2017
MicroChess	Jul 14, 2015
Mike Johnson	Jan 7, 2016
Milton Bradley Phantom	Apr 18, 2016
Morphy	Dec 25, 2017
MyChess	Dec 25, 2017
Netherlands-vs-Computers-1989	Mar 10, 2017
Nona	Jan 7, 2016
Novag	Aug 19, 2015
Novag Expert	Aug 3, 2013
Novag Forte	Aug 3, 2013
Par Excellence	Mar 23, 2014
PCW-MCC 1978	Dec 9, 2012
Personal Computing	Dec 27, 2017
Peter Jennings	Mar 18, 2016
Philidor	Jan 7, 2016
Piece-Lists	Feb 13, 2017
Plymate	Jan 7, 2016
President Chess	Jun 11, 2016
Princhess	Sep 3, 2017
Private Line	Jan 8, 2016
Querg	Dec 11, 2013
RCS Granit	Dec 9, 2015
Rebel	Feb 25, 2018
Rex Kent	Jan 8, 2016
Rufus	Dec 26, 2016
Saitek	Jun 11, 2016
Sargon	Dec 25, 2017
Schaker	Nov 10, 2015
SciSys Leonardo	Jun 23, 2017
Sensor Chess	Jun 7, 2013
Sensory 9	Jan 8, 2016
SEX Algorithm	Nov 25, 2014
Srdja Matovic	Apr 14, 2018
Stan Arts	Nov 21, 2014
Steinitz	Nov 10, 2014
Steven Edwards	Aug 26, 2017
Stockholm MCCT 1979	Oct 12, 2013
Stockholm MCCT 1980	Sep 5, 2017
Stockholm MCCT 1981	Oct 12, 2013
Super Constellation	Oct 1, 2016
Superstar	Jan 8, 2016
The Final Chesscard	Apr 7, 2013
Thomas Gaksch	Jan 8, 2016
Thomas Starke	Dec 1, 2012
Tumult	Feb 6, 2018
Turbostar	Jan 8, 2016
Ulf Rathsman	Jan 7, 2016
USOCCC 1987	Nov 30, 2017
Usurpator	Jul 30, 2017
Vega	Jan 8, 2016
Video Chess	Dec 23, 2017
WCCC 1980	Dec 25, 2017
WCCC 1983	Jan 20, 2018
WCCC 1986	Jul 27, 2017
WCCC 1989	Dec 5, 2017
White Knight	Dec 12, 2016
Will Singleton	Mar 6, 2015
WMCCC 1980	Dec 25, 2017
WMCCC 1981	Apr 3, 2017
WMCCC 1983	Jun 5, 2017
WMCCC 1984	Dec 31, 2017
WMCCC 1985	Feb 6, 2018
WMCCC 1986	Jan 7, 2016
WMCCC 1987	Jan 7, 2016
WMCCC 1989	Oct 27, 2016
Y!	Sep 10, 2017
Z80	Dec 25, 2017
Zen	Aug 4, 2016
Ziggy	Jan 12, 2016
ZX Spectrum Chess	Aug 3, 2016

Up one Level

6800

GerdIsenberg — Fri, 23 Jun 2017 18:52:46 GMT

Home * Hardware * 6800

		The 6800 (M6800) was an 8-bit microprocessor designed and marketed by Motorola in 1974, with an architecture and orthogonal instruction set influenced by Digital Equipment Corporation PDP-11. Opposed to Intel's 8080 and MOS Technology 6502, the 6800 was a big-endian machine, concerning the byte-order of 16-bit words in memory.
Motorola 6800 die ^[1]

Architecture

The 6800 had two accumulators and a 16-bit index register, stack- and instruction pointer. The direct addressing mode allowed fast access the first 256 bytes of memory.

MC6800 registers and I/O lines ^[2]

Manuals

^[3]

External Links

6800

6800 Controller

References

^ Motorola 6800 from visual6502.org
^ Motorola 6800 from Wikipedia
^ Manuals hosted by the Internet Archive
^ HD6301Y0 Datasheet(PDF) - Hitachi Semiconductor
^ Hitachi HD6301V1 from Schachcomputer.info Wiki

What links here?

Page	Date Edited
6502	Dec 25, 2017
6800	Jun 23, 2017
68000	Jun 7, 2016
8080	Sep 3, 2017
ACM 1978	Dec 23, 2017
CXG Sensor Computachess	Jun 23, 2017
CXG Sphinx	Jun 23, 2017
CXG Star Chess	Jun 23, 2017
DOCCC 1981	Nov 14, 2015
DOCCC 1983	Nov 13, 2015
DOCCC 1985	Dec 9, 2016
Enterprise	Jun 23, 2017
Fidelity Electronics	Dec 1, 2017
Hardware	Jan 20, 2018
Harm Geert Muller	Mar 31, 2018
Ira Baxter	Dec 22, 2017
Lars Karlsson	Jan 8, 2016
LogiChess	Jun 23, 2017
Mephisto Europa	Jun 23, 2017
Mike	Jan 8, 2016
Mike Johnson	Jan 7, 2016
PCW-MCC 1978	Dec 9, 2012
PDP-11	Jan 5, 2016
SciSys Leonardo	Jun 23, 2017
SD Chess	Dec 22, 2017
Usurpator	Jul 30, 2017
WCCC 1986	Jul 27, 2017
Z80	Dec 25, 2017

Up one Level

68000

GerdIsenberg — Tue, 07 Jun 2016 14:09:17 GMT

Home * Hardware * 68000

		68000 (MC68000, 68K), a 16/32-bit CISC microprocessor designed and marketed by Freescale Semiconductor since 1979, started as a division of Motorola. It was used in Atari ST, Commodore Amiga, and Apple Macintosh personal computers, as well in Sun-1 workstations and many dedicated chess computers. 68000 has an external 16-bit data bus and 24 external address lines to index 16 MByte of physical memory, eight 32-bit general-purpose data registers (D0-D7), and eight address registers (A0-A7). The last address register was also the standard stack pointer, and could be called either A7 or SP ^[1]. Despite different data- and address registers, 68000 was known for its orthogonal instruction set ^[2]. Like its 8-bit predecessor 6800, but opposed to x86, 68000 is a Big-endian machine.
Die shot of Motorola 68000 ^[3]

Publications

MOTOROLA M68000 FAMILY - Programmer’s Reference Manual (pdf)
68000 Assembler - User's Manual (pdf) by Paul McKee

External Links

Motorola 68000 from Wikipedia
Motorola 68000 family from Wikipedia
68000 Assembly - Wikibooks
Rookie 1.0 68000 assembly source, search.s from Index of /rookie/nostalgia/v1

References

^ Motorola 68000 from Wikipedia
^ 68000 instructions
^ Die shot of Motorola 68000 microprocessor (MC68000L12) by Pauli Rautakorpi, March 10, 2014, Wikimedia Commons

What links here?

Page	Date Edited
1st Computer Olympiad	Jul 25, 2017
2nd Computer Olympiad	Jul 12, 2017
6800	Jun 23, 2017
68000	Jun 7, 2016
68020	Jun 7, 2016
68030	Jun 7, 2016
ACM 1981	Jan 19, 2018
ACM 1982	Jul 19, 2016
ACM 1986	Dec 5, 2017
Advance	Jan 7, 2016
Alexander Reinefeld	Jul 4, 2016
Amateur	Feb 25, 2012
Amiga	Mar 24, 2016
Assembly	Sep 3, 2017
Atari ST	Dec 7, 2016
Attila Kovács	Jan 7, 2016
Bernie	Oct 31, 2015
Chaturanga	Apr 4, 2013
Chess Challenger	Dec 27, 2017
Chess Genius	Feb 26, 2018
Chess Player 2150	Jan 1, 2017
Chess Simulator	Dec 7, 2016
Chessmaster	Jan 21, 2018
Colossus Chess	Dec 10, 2017
CXG Sphinx	Jun 23, 2017
Cyrus	Jul 22, 2014
Cyrus 68K	Jan 7, 2016
Dieter Steinwender	Jul 4, 2016
Dirk Hauschildt	Jul 4, 2016
DOCCC 1983	Nov 13, 2015
DOCCC 1984	May 22, 2016
DOCCC 1985	Dec 9, 2016
DOCCC 1986	Dec 9, 2016
DOCCC 1993	Dec 12, 2016
Elite	Oct 1, 2016
Excel	Dec 5, 2016
Fidelity	Jan 7, 2016
Fidelity Electronics	Dec 1, 2017
Hardware	Jan 20, 2018
Interdata M85	Oct 30, 2013
International Computer Chess Tournament 1984	Dec 21, 2017
Kempelen	Mar 24, 2016
Mac OS	Mar 25, 2016
Macintosh	Dec 7, 2016
Mephisto	Dec 18, 2017
Mephisto (H)	Dec 18, 2017
Mephisto Almeria	Sep 1, 2017
Mephisto Amsterdam	Sep 4, 2017
Mephisto Dallas	Sep 1, 2017
Mephisto Lyon	Sep 1, 2017
Mephisto Portorose	Sep 1, 2017
Mephisto Roma	Sep 1, 2017
Mephisto Vancouver	Sep 2, 2017
MicroMurks	Jan 8, 2016
Murks	Jul 4, 2016
Orwell	Dec 31, 2017
Parabelle	Jul 28, 2017
PDP-11	Jan 5, 2016
Pion	May 22, 2016
Psion	Mar 20, 2017
Richard Lang	Jan 7, 2016
Rookie	Jan 7, 2016
Sargon	Dec 25, 2017
SCHK-Y	Sep 9, 2015
SEX Algorithm	Nov 25, 2014
Spector	Nov 11, 2016
Sun	Jun 7, 2016
The Sniper	Jun 3, 2016
USOCCC 1987	Nov 30, 2017
WCCC 1983	Jan 20, 2018
WCCC 1986	Jul 27, 2017
Will Singleton	Mar 6, 2015
WMCCC 1983	Jun 5, 2017
WMCCC 1984	Dec 31, 2017
WMCCC 1985	Feb 6, 2018
WMCCC 1986	Jan 7, 2016
WMCCC 1987	Jan 7, 2016
WMCCC 1989	Oct 27, 2016
XChess	Sep 9, 2015

Up one Level

68020

GerdIsenberg — Tue, 07 Jun 2016 13:08:40 GMT

Home * Hardware * 68020

		The 68020 (MC68020) is a 32-bit microprocessor by Motorola, released in 1984 as successor of the 68000 and 68010. Amongst others, it was used in Apple Macintosh II personal computers, Sun-3 workstations, and advanced dedicated chess computers. 68020 has a 32-bit ALU, and like already the 68010 a "loop mode", considered a mini instruction cache. As further improvements, it has Coprocessor- and Multiprocessing support, an scaled indexing addressing mode with another level of indirection to many of the pre-existing modes, and some new instructions, 32×32→64 bits multiply and 64÷32→32 bits quotient and 32 bits remainder instructions, and bit field support, including a bit field find first one instruction (BFFFO), which actually performs an up to 32-bit Leading Zero Count ^[1].
Die shot of Motorola 68020 ^[2]

Publications

MOTOROLA M68000 FAMILY - Programmer’s Reference Manual (pdf)
Clara I. Serrano (1985). Introducing the MC68020: Performance and flexibility improvement through redesigned hardware and software enhancements. Proceedings of the National Computer Conference, pdf

External Links

References

^ Bit Field Instructions
^ Die shot of Motorola 68020 microprocessor (MC68020FE16E) by Pauli Rautakorpi, September 26, 2013, Wikimedia Commons

What links here?

Page	Date Edited
68000	Jun 7, 2016
68020	Jun 7, 2016
68030	Jun 7, 2016
ACM 1986	Dec 5, 2017
ACM 1987	Dec 5, 2017
ACM 1988	Dec 5, 2017
Aegon 1990	Mar 26, 2017
BitScan	Sep 10, 2017
Brainstorm	Jun 24, 2017
Chat	Jan 7, 2016
Chess Challenger	Dec 27, 2017
Chess Monster	Jun 21, 2017
CXG Sphinx	Jun 23, 2017
Elite	Oct 1, 2016
Excel	Dec 5, 2016
Fidelity	Jan 7, 2016
Fidelity Electronics	Dec 1, 2017
Hardware	Jan 20, 2018
MacChess	Oct 28, 2013
Macintosh	Dec 7, 2016
Mephisto Almeria	Sep 1, 2017
Mephisto Amsterdam	Sep 4, 2017
Mephisto Dallas	Sep 1, 2017
Mephisto Lyon	Sep 1, 2017
Mephisto MM IV	Sep 1, 2017
Mephisto Portorose	Sep 1, 2017
Mephisto Roma	Sep 1, 2017
Mephisto Vancouver	Sep 2, 2017
Orwell	Dec 31, 2017
Psion	Mar 20, 2017
Richard Lang	Jan 7, 2016
SPARC	Jan 17, 2017
Sun	Jun 7, 2016
USOCCC 1987	Nov 30, 2017
WCCC 1986	Jul 27, 2017
WCCC 1989	Dec 5, 2017
WMCCC 1985	Feb 6, 2018
WMCCC 1986	Jan 7, 2016
WMCCC 1987	Jan 7, 2016
WMCCC 1991	Sep 18, 2016

Up one Level

8080

GerdIsenberg — Sun, 03 Sep 2017 18:02:33 GMT

Home * Hardware * 8080

		8080, a 8-bit microprocessor from Intel released in April 1974 running at 2 MHz. The 8080 is generally considered to be the first truly usable microprocessor. It had an 8-bit data-bus and 16-bit address-bus, allowing to address 64 KByte of memory, containing program code as well as data (Von Neumann architecture).
1974: 8080 Microprocessor ^[1]

Architecture

Intel 8080 Architecture ^[2]

Register Files

8080 had seven byte-registers: A, B, C, D, E, H, and L. A was the 8-bit accumulator for most arithmetical and logical instructions and the other six could be used as either byte-registers or as three 16-bit register pairs (BC, DE, HL) depending on the particular instruction. HL was also used as (a limited) 16-bit accumulator. It further had a 16-bit stack pointer register and an 16-bit instruction pointer. After a hardware reset ip was cleared zero and started to fetch the first instruction from that address.

Successors

Successor was Intel 8085 in 1977 with same instruction set but required less supporting hardware, and Zilog Z80 ^[3] .

Endianess

8080 and all it's successors were little-endian machines, concerning the byte-order of 16-bit words in memory.

Software

Operating Systems

Development

Chess Programs

Publications

Tandy/Radio Shack (1977). 8080-8085 Assembly Language Programming (Intel). |Internet Archive
Kathe Spracklen (1979). Z-80 and 8080 assembly language programming. Hayden Books, amazon.com, Internet Archive

External Links

References

^ Microprocessor Hall Of Fame
^ Intel 8080 from Wikipedia
^ Zilog Z80 from Wikipedia
^ Kathe Spracklen (1979). Z-80 and 8080 assembly language programming. Hayden Books, ISBN: 978-0810451674, amazon.com
^ The Almost Official MIX C for CP/M 80 Museum
^ Floppy Software: List of C Compilers for CP/M
^ ISIS, PL/M and Intel (c)Copyright Herb Johnson 2009 except as quoted remarks
^ Turbo Pascal: A Great Choice For Programming Under CP/M
^ MicroChess, a Chess playing program for the 8080 Microcomputer by Peter Jennings (pdf) © 2005 The Computer History Museum

What links here?

Page	Date Edited
6502	Dec 25, 2017
6800	Jun 23, 2017
8080	Sep 3, 2017
8080 Chess	Nov 17, 2016
8086	Sep 18, 2014
ACM 1977	Dec 22, 2017
Assembly	Sep 3, 2017
Chess Challenger	Dec 27, 2017
Compucolor Chess	Dec 22, 2017
Computerworld	Sep 9, 2017
Fidelity Electronics	Dec 1, 2017
Gambiet	Jan 8, 2016
Hardware	Jan 20, 2018
Intel	Aug 29, 2015
Intellect	Jun 13, 2013
KIM-1	Oct 9, 2014
Labirint 64	Dec 21, 2017
Lars Karlsson	Jan 8, 2016
MicroChess	Jul 14, 2015
Microsoft	Dec 27, 2016
Nightmare NL	Dec 12, 2016
Óscar Toledo Gutiérrez	Feb 1, 2015
Parwell	Sep 9, 2017
Pascal	Nov 28, 2016
Peter Jennings	Mar 18, 2016
Robert Arnstein	Nov 17, 2016
Ron Nelson	Feb 4, 2016
Siberian Chess	Feb 27, 2017
SMS 201	Sep 9, 2017
Stack	Nov 18, 2016
Viktor	Jan 8, 2016
Viorel Darie	Dec 21, 2017
WMCCC 1980	Dec 25, 2017
WMCCC 1983	Jun 5, 2017
Z80	Dec 25, 2017

Up one Level

8086

GerdIsenberg — Thu, 18 Sep 2014 07:43:35 GMT

Home * Hardware * 8086

		8086, a 16-bit microprocessor designed by Intel since 1976, released in 1978. Its principal architect was Stephen P. Morse. Marketed as source compatible, the 8086 was designed so that assembly language for the 8-bit 8080 could be automatically converted into equivalent (sub-optimal) 8086 source code. The Intel 8088 variant had an 8-bit external data bus and was used in the original IBM PC. 8086 was the forerunner of Intel's x86 32-bit architecture, starting with the 80386 in 1985. Despite the huge distribution of 8086/8088 based PCs, the 8086 was rarely found in Dedicated Chess Computers.
Intel 8086 die ^[1]

Registers

The eight 8080 registers A, B, C, D, E, H, L, SP, with BC, DE and HL as possible 16 bit registers, were extended to eight (more or less general) 16-bit registers including the stack pointer. Four general purpose (GP) registers may treated as 16-bit Word as well as high and low Byte:

16 bit	8 high	8 low	Purpose
AX	AH	AL	GP, Accumulator
BX	BH	BL	GP, Base, Index Register
CX	CH	CL	GP, Counter, variable shift, rotate via CL
DX	DH	DL	GP, high Accumulator mul/div
SI	-	-	GP, Source Index
DI	-	-	GP, Destination Index
SP	-	-	Stack Pointer
BP	-	-	GP, Base Pointer
Segment Registers
CS	-	-	Code Segment
DS	-	-	Data Segment
ES	-	-	Extra Segment
SS	-	-	Stack Segment

Segmentation

The 8086 was able to address one MByte of physical memory and its external address bus was 20 bit wide (the first 16 multiplexed with the data bus). The physical address translation was done by shifting a segment register 4 bits left and adding an 16 bit offset.

effective or physical address := 16 * segment + offset

As a result, each external address could be referred to by 212 different segment:offset pairs. Considered complicated and cumbersome by many (chess) programmers, this scheme had the advantage in porting programs less than 64 kilobytes from 8-bit 8080 avoiding the need for relocation.

Pointer

Compilers for the 8086 supported two or even three types of pointers, near, far and huge. Near pointers were 16-bit offsets implicitly associated with the program's code and/or data/stack segment and could only used within parts of a program small enough to fit in one 64 kilobyte segment. Far pointers were 32-bit segment:offset pairs. Huge pointers, which were like far pointers except that pointer arithmetic on a huge pointer treated it as a linear 20-bit pointer, while pointer arithmetic on a far pointer wrapped around within its 16-bit offset without touching the segment part of the address.

Memory models

To avoid the need to specify near and far on pointers, data structures, and functions, compilers supported "memory models" which specified default pointer sizes. The tiny (max 64K), small (max 128K), compact (data > 64K), medium (code > 64K), large (code,data > 64K), and huge (individual arrays > 64K) models covered practical combinations of near, far, and huge pointers for code and data. The tiny model with code and data in a single segment, just as in most 8-bit based processors, could be used to build .com-files. Precompiled libraries often came in several versions compiled for different memory models ^[2] .

Clones

Publications

Steve Ciarcia (1979). The Intel 8086. BYTE, Vol. 4, No. 11, pp. 14-24

External Links

References

What links here?

Page	Date Edited
0x88	Nov 28, 2016
8086	Sep 18, 2014
ACM 1985	Jun 21, 2017
ACM 1986	Dec 5, 2017
ACM 1987	Dec 5, 2017
Algir	Feb 17, 2013
Assembly	Sep 3, 2017
Axon	Jul 14, 2013
Byte Magazine	Nov 20, 2016
Check Check	Jan 8, 2016
Chess Genius	Feb 26, 2018
Chess Monster	Jun 21, 2017
Chess Player 2150	Jan 1, 2017
Chess Simulator	Dec 7, 2016
Chessmaster	Jan 21, 2018
Colossus Chess	Dec 10, 2017
Cyborg	Aug 8, 2016
David Broughton	Jan 7, 2016
Debugging	Jan 20, 2018
DOCCC 1981	Nov 14, 2015
DOCCC 1983	Nov 13, 2015
DOCCC 1985	Dec 9, 2016
DOCCC 1986	Dec 9, 2016
DOCCC 1987	Dec 9, 2016
Drago	Apr 22, 2017
Gambiet	Jan 8, 2016
Gerd Isenberg	Apr 4, 2016
Greco	Feb 12, 2015
Hardware	Jan 20, 2018
IBM PC	Dec 9, 2016
Intel	Aug 29, 2015
Jan Kuipers	Feb 7, 2015
Kevin Leavelle	Feb 19, 2017
MCC 1980	Dec 27, 2017
Mirage	Jul 12, 2016
MS-DOS	Feb 3, 2018
MyChess	Dec 25, 2017
Nona	Jan 7, 2016
Parker Chess	Jun 30, 2013
Pascal	Nov 28, 2016
Philidor	Jan 7, 2016
Psion	Mar 20, 2017
Psion Chess (Barel)	Apr 22, 2012
Raffaela	Apr 22, 2017
Repetitions	Jan 16, 2018
RexChess	Dec 7, 2016
Richard Lang	Jan 7, 2016
Sargon	Dec 25, 2017
SEX Algorithm	Nov 25, 2014
Sfinks	Dec 25, 2017
Siberian Chess	Feb 27, 2017
Socrates	Jul 3, 2018
SPOC	Jun 21, 2017
Stack	Nov 18, 2016
Tiny Chess 86	Dec 24, 2017
WCCC 1983	Jan 20, 2018
WCCC 1986	Jul 27, 2017
WCCC 1989	Dec 5, 2017
William Fink	Dec 25, 2017
WMCCC 1984	Dec 31, 2017
Word	Jan 25, 2015
x86	Jan 4, 2018
Z80	Dec 25, 2017

Up one Level

Acorn Archimedes

GerdIsenberg — Sat, 17 Dec 2016 08:54:01 GMT

Home * Hardware * Acorn Archimedes

		Acorn Archimedes, (BBC Archimedes) a family of personal computers or workstations by Acorn Computers Ltd launched from July 1987 to the 90s, their first general purpose computer based on their own 32-bit ARM architecture with ARM2 and later ARM3 CMOS RISC processors running at 8 MHz. Acorn Archimedes were mounted in two-part cases with a small central unit, and monitor on top, and a separate keyboard and three-button mouse. The RISC OS operating system employs cooperative multitasking, featuring a command-line interface and a WIMP graphical user interface. The core OS was stored in ROM. While the Archimedes is no longer sold, computers such as the Raspberry Pi can still run its operating system ^[1], RISC OS (at least later versions) as they use ARM chips that are (mostly) compatible ^[2].
Acorn Archimedes ^[3]

Models

Model	Year	RAM [MiB]	Hard disk [MiB]	Processor
A305	1987	1/2		ARM2
A310	1987	1		ARM2
A410	1987	1		ARM2
A440	1987	4	20	ARM2
A420/1	1989	2	20	ARM2
A540	1990	16	120	ARM3

ARM Development

The Acorn Archimedes was development platform for many ARM2 based chess entities and dedicated chess computers, which software was not sold for the Archimedes itself - notably the World Microcomputer Chess Champion of the WMCCC 1991 and World Computer Chess Champion of the WCCC 1992, Gideon for the TASC ChessMachine by Ed Schröder, likely also The King by Johan de Koning for the same platform, and their dedicated RISC branches such as the Mephisto Risc.

Chess Programs

Manuals

^[5]

Acorn Computers Ltd (1987). Archimedes High Performance Computer Systems. pdf from Chris's Acorns: Archimedes
Acorn Computers Ltd (1988). Archimedes 300 Series Module Level Service Manual. pdf
Acorn Computers Ltd (1991). Archimedes 500 Series Acorn R200 Series Service Manual. pdf

External Links

Acorn Archimedes

Software

Chess Programs

Archimedes

References

^ RISC OS Open: Raspberry Pi
^ Acorn Archimedes from Wikipedia
^ Image (Text clipped) from REBEL World Champion (1991-1995) by Ed Schröder
^ StrongARM speed of Streater program (was Re: M-Chess Pro 6.0 program description) by Stephen B. Streater, rgcc, October 20, 1996
^ Chris's Acorns: Acorn Manuals

What links here?

Page	Date Edited
1st Computer Olympiad	Jul 25, 2017
2nd Computer Olympiad	Jul 12, 2017
Acorn Archimedes	Dec 17, 2016
Acorn Atom	Dec 11, 2016
Battle Chess	Dec 12, 2016
BBC Micro	Dec 16, 2016
Chessmate	Dec 12, 2016
Cyber Chess	Nov 13, 2015
DOCCC 1992	Dec 12, 2016
DOCCC 1993	Dec 12, 2016
E6P	Dec 17, 2016
Hardware	Jan 20, 2018
Knowledge	Jul 22, 2017
Stephen B. Streater	Dec 17, 2016

Up one Level

Acorn Atom

GerdIsenberg — Sun, 11 Dec 2016 13:45:19 GMT

Home * Hardware * Acorn Atom

		Acorn Atom, a 6502 based home computer manufactured and released by Acorn Computers Ltd in 1980. It lacked a disk drive but had an integrated keyboard and cassette interface. The Atom had 2 KiB expandable to 12 KiB of RAM and 8 KiB expandable to 12 KiB of ROM including Atom BASIC ^[1]. In late 1982, Acorn released an upgrade ROM which allowed users to switch between Atom BASIC and the more advanced BBC BASIC used by its successor, the BBC Micro. The Motorola 6847 video chip provided text and graphics displayed on a TV or video monitor.
Acorn Atom ^[2]

Chess Programs

Manuals

^[4]

Acorn Atom Technical Manual from Computing History
David Johnson-Davies (1980). Atomic Theory and Practice.

Forum Posts

Re: Atom Software Archive by Multiwizard, stardot.org.uk, November 13, 2015 » Usurpator II

External Links

Acorn Atom

Chess Programs

Misc

References

^ David Johnson-Davies (1980). Atomic Theory and Practice.
^ Photo taken by Rept0n1x at Play Expo 2013, held at EventCity Manchester, England, October 12, 2013, CC BY-SA 3.0, Wikimedia Commons
^ Acorn Nieuws 1982 nummer 4
^ Acorn Atom Books by hoglet, stardot.org.uk, June 23, 2013

What links here?

Page	Date Edited
Acorn Archimedes	Dec 17, 2016
Acorn Atom	Dec 11, 2016
Atom Chess	Dec 11, 2016
Basic	Jan 3, 2018
BBC Micro	Dec 16, 2016
Chess (David Thompson)	Dec 11, 2016
Chessmate	Dec 12, 2016
Chessnut	Dec 10, 2016
DOCCC 1985	Dec 9, 2016
DOCCC 1986	Dec 9, 2016
Geoffrey Bulmer	Dec 10, 2016
Hardware	Jan 20, 2018
Usurpator	Jul 30, 2017
Your Computer	Dec 10, 2016

Up one Level

Advance

GerdIsenberg — Thu, 07 Jan 2016 13:41:06 GMT

Home * Engines * Advance

Advance,
a chess system by Mike Johnson and Dave Wilson, based on a home constructed and built hardware with bit slice technology, controlled by a general purpose microprocessor, until version 3.0 a 6502, the Advance 68k in 1986 had the 16-bit 68000. The bit slice technique allowed Advance to utilize bitboards ^[1], along with sliding piece attack and move generation.

Tournaments

Advance had its debut at the WMCCC 1980 in London ^[2], mentioned as Mike 3, the name of Mike Johnson's older program, and a few weeks later officially as Advance 1.0 at the WCCC 1980 in Linz. Due to its technology the micro computer status was disputed ^[3], but it was allowed to play the European Microcomputer Chess Championships.

Advance 2.0 was runner up behind Cyrus at the European MCC 1981, Advance 2.4 and Advance 3.0 won the European MCC 1982 ^[4] and European MCC 1983 respectively. Advance 2.4 further played the ACM 1982, Advance 3.0 the WCCC 1983 in New York, and Advance 68K the WCCC 1986 in Cologne ^[5].

Selected Games

Duel vs. Mainframe

ACM 1982, Round 2, Ostrich - Advance 2.4 ^[6]

[Event "ACM 1982"]
[Site "Dallas USA"]
[Date "1982.10.24"]
[Round "2"]
[White "Ostrich"]
[Black "Advance 2.4"]
[Result "0-1"]
 
1.e4 c5 2.Nf3 d6 3.d4 cxd4 4.Nxd4 Nf6 5.Nc3 a6 6.Bg5 e6 7.Be2 Be7
8.Be3 Nbd7 9.O-O Nc5 10.f3 Qc7 11.a4 O-O 12.Qe1 e5 13.Nb3 Nxb3 14.cxb3 Be6
15.b4 d5 16.exd5 Nxd5 17.Nxd5 Bxd5 18.b5 Bc5 19.Bxc5 Qxc5+ 20.Kh1 a5
21.Qg3 Qd4 22.Rad1 Qxb2 23.Qf2 Rad8 24.Rd3 Bb3 25.Qg1 Rxd3 26.Bxd3 Bxa4
27.Qc5 Rd8 28.Bc4 Qb4 29.Qxb4 axb4 30.h3 Bc2 31.g3 b3 32.Kg2 Rd4 33.Ra1 Kf8
34.Ra8+ Ke7 35.Bxb3 Bxb3 36.Rh8 h6 37.Rc8 Rd2+ 38.Kf1 Bd5 39.f4 Rd3
40.fxe5 Rxg3 41.h4 Rg4 42.Rg8 Bc4+ 43.Ke1 Bxb5 44.Rb8 Bc6 45.Rg8 0-1

Bit-Slice Duel

WCCC 1986, Round 4, Bebe - Advance 68K ^[7]

[Event "WCCC 1986"]
[Site "Cologne, Germany"]
[Date "1986.06.14"]
[Round "4"]
[White "Bebe"]
[Black "Advance 68K"]
[Result "1-0"]
 
1. e4 c5 2. Nf3 d6 3. d4 cxd4 4. Nxd4 Nf6 5. Nc3 g6 6. Be2 Bg7 7. O-O Nc6 
8. Nb3 O-O 9. Be3 Bd7 10. f4 Be6 11. f5 gxf5 12. exf5 Bd7 13. Qd2 Qc7 
14. Bg5 Nb4 15. Rf2 h6 16. Bxh6 Bxh6 17. Qxh6 Qb6 18. Rd1 Nxc2 19. Qg5+ Kh7 
20. Rd3 Qxf2+ 21. Kxf2 Ne4+ 22. Nxe4 Ne3 23. Rxe3 Bxf5 24. Qxf5+ Kh6 
25. Rg3 Rad8 26. Qh3# 1-0

Publications

Tony Harrington (1982). Advance to the fore. Personal Computer World, December 1982 » European MCC 1982
Tony Harrington (1983). Advance Warning. Personal Computer World, November 1983

External Links

References

^ Tony Harrington (1983). Advance Warning. Personal Computer World, November 1983
^ Tony Harrington (1983). Advance Warning. Personal Computer World, November 1983
^ Tony Harrington (1983). Advance Warning. Personal Computer World, November 1983
^ Tony Harrington (1982). Advance to the fore. Personal Computer World, December 1982
^ Advance's ICGA Tournaments
^ PGN Download NACCC from Computerschaak/Downloads/Games hosted by CSVN
^ Cologne 1986 - Chess - Round 4 - Game 6 (ICGA Tournaments)

What links here?

Page	Date Edited
ACM 1982	Jul 19, 2016
Advance	Jan 7, 2016
Applied Concepts	Dec 25, 2017
Chess 2001	Jan 8, 2016
Cyrus	Jul 22, 2014
Dave Wilson	May 22, 2016
Delta (GB)	Dec 9, 2012
Engines	Mar 10, 2018
European MCC 1981	May 22, 2016
European MCC 1982	May 22, 2016
European MCC 1983	May 22, 2016
European Microcomputer Chess Championship	May 22, 2016
La Regence	Jul 23, 2015
Mike	Jan 8, 2016
Mike Johnson	Jan 7, 2016
PCW Microcomputer Chess Championship	May 22, 2016
Personal Computer World	Apr 12, 2013
Tony Harrington	Sep 26, 2014
WCCC 1980	Dec 25, 2017
WCCC 1983	Jan 20, 2018
WCCC 1986	Jul 27, 2017

Up one Level

AMDAHL 470

GerdIsenberg — Tue, 19 Jul 2016 11:28:20 GMT

Home * Hardware * Amdahl 470

		Amdahl 470, Amdahl Corporation's first machine, the Amdahl 470V/6 shipped in 1975, was a plug compatible mainframe computer designed by former IBM Fellow and chief architect of IBM System/360 Gene Amdahl. Competing with IBM in the mainframe market, it was a less expensive, more reliable and faster replacement for the System 370/168. By purchasing an Amdahl 470 and plug-compatible peripheral devices from third-party manufacturers, customers could now run S/360 and S/370 applications under VM without buying actual IBM hardware ^[1].
Amdahl 470V/6 system ^[2]

Technology

The Amdahl 470V/6 uses large scale integration (LSI) semiconductor technology, bipolar emitter-coupled logic (ECL) in the CPU, metal–oxide–semiconductor (MOS) in main memory, and ultra high speed bipolar components for the cache memory ^[3].

Processor

The 32-bit CPU contains 16 general purpose registers, eight floating point registers, eight scratchpad and control registers, and consists of four logical, independent units. The instruction unit implements an instruction pipeline with fetch, decode, execute, memory and register access stages and coordinates with other units. The execution unit performs the arithmetic and logical instructions, the storage unit controls high-speed buffer and main memory requests, the channel unit I/O requests ^[4]. The CPU archives 3.5 MIPS ^[5].

Chess Programs

Publications

Allan R. Emery, Michael T. Alexander (1975). A Performance Comparison of the Amdahl 470V/6 and the IBM 370/168. Computer Measurement Group, October 1975, San Francisco, California, pdf » AMDAHL 470, IBM 370
Alexis J. Pittman (1975). The Amdahl 470v/6: The Latest in Computer Technology. Michigan Technic, Vol. XCIV, No. 2, November 1975

External Links

References

^ Gene Amdahl - The IBM & Amdahl years - Wikipedia
^ The Amdahl 470/V6 was a powerful mainframe computer introduced in 1975 that ran the popular IBM System/360 family of programs. In 1978, the microprocessor-based program Sargon defeated Tony Marsland’s chess program Awit running on this type of machine. Even though the 470/V6 was by then over a decade old, this was still a dramatic development and showed the growing power of microcomputers, image from The Computer History Museum
^ Alexis J. Pittman (1975). The Amdahl 470v/6: The Latest in Computer Technology. Michigan Technic, Vol. XCIV, No. 2, November 1975
^ Alexis J. Pittman (1975). The Amdahl 470v/6: The Latest in Computer Technology. Michigan Technic, Vol. XCIV, No. 2, November 1975
^ Amdahl 470V/6 Computer - CPU from The Computer History Museum

What links here?

Page	Date Edited
ACM 1975	Jan 19, 2018
ACM 1976	Dec 27, 2017
ACM 1977	Dec 22, 2017
ACM 1978	Dec 23, 2017
ACM 1979	Apr 3, 2017
ACM 1980	Dec 25, 2017
ACM 1981	Jan 19, 2018
ACM 1982	Jul 19, 2016
AMDAHL 470	Jul 19, 2016
Claude Jarry	Jan 7, 2016
Computerworld	Sep 9, 2017
Hardware	Jan 20, 2018
IBM 370	Jan 20, 2018
ICL 4-70	Aug 26, 2014
L'Excentrique	Jan 7, 2016
Mike Alexander	Jul 19, 2016
Sargon	Dec 25, 2017
Tech	Apr 20, 2018
TechMate	Aug 23, 2014
TR 440	Aug 28, 2014
WCCC 1977	Dec 22, 2017
WCCC 1980	Dec 25, 2017
WCCC 1986	Jul 27, 2017

Up one Level

Amiga

GerdIsenberg — Thu, 24 Mar 2016 15:02:55 GMT

Home * Hardware * Amiga

		Amiga, a family of personal computers marketed by Commodore International from the mid 80s to the mid 90s. Amiga was based on 68000 series of microprocessors and a custom chipset with graphics and sound capabilities, and had a pre-emptive multitasking operating system called AmigaOS. While especially the Amiga 500 was quite successful in Europe, later models had a hard time to compete versus the upcoming Apple Macintosh and the IBM PC and its compatibles. In 2012, Commodore USA, LLC sell a new line of PCs using the classic Commodore and Amiga name brands of personal computers, having licensed the Commodore brand from Commodore Licensing BV on August 25, 2010 ^[1] and the Amiga brand from Amiga, Inc. on August 31, 2010 ^[2] ^[3].
Amiga 1000 ^[4]

Hyperion Entertainment

Screenshots

Rookie 1.0 ^[5]

Amiga Engines

To expand this dynamic list, create a new engine page with the tag "amiga".

Forum Posts

Chessmaster 2000 for Amiga, Release: 1986 by Omid David, CCC, January 16, 2003

External Links

Companies

Models

Commodore USA

OS & Firmware

Chess Programs

Sargon III for Amiga (1988) - MobyGames » Sargon

Misc

References

^ Commodore Announces Exclusive Worldwide Licensing Rights - Companies Ink Deal For New Product Line | PRLog
^ Amiga News
^ Commodore USA from Wikipedia
^ Commodore Amiga 1000 personal computer with 1081 RGB monitor. (1985). Original photo by Kaiiv, September 17, 2008, Editing by Pixel8, Wikimedia Commons, Amiga from Wikipedia
^ Index of /rookie/nostalgia/v1

What links here?

Page	Date Edited
2nd Computer Olympiad	Jul 12, 2017
68000	Jun 7, 2016
68030	Jun 7, 2016
Amiga	Mar 24, 2016
Amy	May 9, 2017
Battle Chess	Dec 12, 2016
Chess Player 2150	Jan 1, 2017
Chess Simulator	Dec 7, 2016
Chessmaster	Jan 21, 2018
Colossus Chess	Dec 10, 2017
Commodore 128	Mar 24, 2016
Commodore 64	Oct 27, 2016
Complete Chess System	Dec 7, 2016
DOCCC 1993	Dec 12, 2016
Francesca	Jan 7, 2016
Gromit	Apr 5, 2017
Hardware	Jan 20, 2018
Herbert Marquardt	Nov 25, 2014
Julien Marcel	Oct 19, 2016
PowerPC	Oct 6, 2017
Prédateur	Nov 11, 2016
Rookie	Jan 7, 2016
Sargon	Dec 25, 2017
SCP	Jun 16, 2016

Up one Level

Amstrad CPC

GerdIsenberg — Sat, 23 Sep 2017 11:21:48 GMT

Home * Hardware * Amstrad CPC

		Amstrad CPC, a series of Z80A based "all in one" home computers, produced by Amstrad between 1984 and 1990, in German speaking countries branded by Amstrad partner Schneider Rundfunkwerke AG as Schneider CPC. The Zilog Z80A processor ran at 4 MHz. The computer issued 64 KiB or up to 128 KiB of RAM using bank switching, expandable to 576 KiB, a video display controller with 3 modes of 16, 4 and 2 colors, the latter with a resolution of 640x200 pixels and 80 text colums, AY-3-8910 sound chip, tape recorder (464) or 3" floppy drive (optional external in 464) and two RS-232 serial ports. The CPC had its native operating systen AMSDOS and Locomotive BASIC interpreter in 32 KiB ROM, and was able to boot CP/M and SymbOS from disk ^[1].
A look inside the CPC6128 ^[2]

Chess Programs

To expand this list, create a new engine page with the tag "cpc".

External Links

CPC

Emulation

References

^ Amstrad CPC from Wikipedia
^ A look inside the CPC6128, Image by Jesus Abizanda, January 29, 2013, CC BY 2.0, Wikimedia Commons, Amstrad CPC from Wikipedia

What links here?

Page	Date Edited
Amstrad CPC	Sep 23, 2017
Anthony Adam	Aug 3, 2016
Artic Computing	Aug 13, 2016
Chessmaster	Jan 21, 2018
Colossus Chess	Dec 10, 2017
Hardware	Jan 20, 2018
Master Chess	Aug 3, 2016
Megachess	Aug 1, 2016
ZX Spectrum	Aug 3, 2016
ZX Spectrum Chess	Aug 3, 2016

Up one Level

Analog Evaluation

GerdIsenberg — Fri, 27 Oct 2017 08:04:25 GMT

Home * Hardware * Analog Evaluation

		Analog Evaluation, (Analogue Evaluation) a hypothetical dedicated special purpose hardware to evaluate a chess position using analog circuits such as resistive networks, operational amplifier (op-amps), and in particular the analogous FPGA counterparts FPAA, to map digital or discrete input signals, representing the board or aspects of the board, to an analog output representing an evaluation score along with some noise as input of an analog-to-digital converter. Jonathan Allen, Edward Hamilton, and Robert Levinson mentioned a method to convert a chess mobility graph to a resistive network which could be computed using the residual resistance property of interconnected chips within their Morph III project ^[1]. Using memristors, memistors, or even a kind of motorized potentiometers ^[2] as used in closed loop control and servomechanisms, would allow the implementation of physical neural networks as analog evaluation device with machine learning features ^[3].
Summing amplifier ^[4]

Summing Amplifier

A summing amplifier using an operational amplifier with feedback resistor Rf sums several (weighted by input resistors 1..n) voltages to an negated output ...

$V_{\text{out}} = -R_{\text{f}} \left( \frac{V_1}{R_1} + \frac{V_2}{R_2} + \cdots + \frac{V_n}{R_n} \right)$

... and may be used to implement a classical evaluation function as linear combination of independent features (F) and associated weights (W):

$\displaystyle Eval = \sum_{i=1}^{n} {F_i * W_i}$

Publications

Jonathan Allen, Edward Hamilton, Robert Levinson (1997). New Advances in Adaptive Pattern-Oriented Chess. Advances in Computer Chess 8
Amir Yazdanbakhsh, Renée St. Amant, Bradley Thwaites, Jongse Park, Hadi Esmaeilzadeh, Arjang Hassibi, Luis Ceze, Doug Burger (2014). Toward General-Purpose Code Acceleration with Analog Computation. ACM SIGARCH Computer Architecture News - ISCA '14, Vol. 42, No. 3, pdf

Forum Posts

Discussion of Special Purpose hardware for chess search by Rick Fadden, CCC, April 25, 2008
Re: Discussion of Special Purpose hardware for chess search by Gerd Isenberg, CCC, April 25, 2008
How can you create an analog sigmoid voltage transfer function (from simple parts)?, AskElektonics, Reddit, March 24, 2014

External Links

References

^ Jonathan Allen, Edward Hamilton, Robert Levinson (1997). New Advances in Adaptive Pattern-Oriented Chess. Advances in Computer Chess 8
^ Motorized potentiometers for high precision proportional controls
^ SciDAC Review - HARDWARE: Cortical Computing with Memristive Nanodevices
^ A circuit diagram of a Summing amplifier made using an operational amplifier, made by Inductiveload, January 26 2009, Wikimedia Commons
^ Rätsel - Wiikipedia.de (German) » Riddle from Wikipedia

What links here?

Page	Date Edited
Analog Evaluation	Oct 27, 2017
Arduino	Feb 21, 2018
Evaluation	Feb 1, 2018
Hardware	Jan 20, 2018
Neural Networks	Mar 12, 2018
PIC Microcontroller	Oct 27, 2017

Up one Level

Apple II

GerdIsenberg — Fri, 22 Dec 2017 19:48:48 GMT

Home * Hardware * Apple II

		Apple II, was one of the first mass produced microcomputer products, manufactured by Apple. The first Apple II computers went on sale on June 5, 1977 ^[1] with a MOS Technology 6502 microprocessor running at 1 MHz, 4 kB of RAM, an audio cassette interface for loading programs and storing data, and the Integer Basic programming language built into the ROM. The video controller displayed 24 lines by 40 columns of monochrome, upper-case-only text on the screen.
Apple II ^[2]

Quotes

from The Computer History Museum ^[3]:

Inspired by the success of the Apple-1 and guided by co-founder Steve Jobs' vision of an expandable user-friendly personal computer, Steve Wozniak designed the Apple II in 1977. The Apple II was a popular platform for commercial chess software developers.

Chess Programs

To expand this list, create a new engine page with the tag "apple2".

1. Battle Chess
2. Chess 7.0
3. Chessmaster
4. Colossus Chess
5. Cyrus
6. Mark Watson Chess
7. MicroChess
8. MicroMurks
9. Nona
10. Rebel
11. Rufus
12. Sargon
13. Tumult
14. White Knight

Publications

Steve Wozniak (1977). System Description: The Apple II. Byte Magazine, May 1977
Charles Sullivan Jr. (1979). A Chess Program for the Apple. Personal Computing, Vol. 3, No. 9, pp. 60 » Sargon
John D. Ferguson (1983). In-Circuit Emulation for the Apple II Computer. Byte Magazine, September 1983, pdf
Ward Douglas Maurer (1984). APPLE assembly language with Lazerware software. Computer Science Press » Assembly

External Links

Apple II

Chess Programs

Misc

References

^ From a Little Apple a Mighty Industry Grows from Wired News, June 5, 1977
^ Apple II computer from The Computer History Museum
^ Apple II computer from The Computer History Museum
^ Steve Jobs from Wikipedia

What links here?

Page	Date Edited
More Links
6502	Dec 25, 2017
ACM 1979	Apr 3, 2017
ACM 1984	Jul 19, 2016
ACM 1985	Jun 21, 2017
Alybadix	Apr 26, 2016
Apple	Feb 17, 2015
Apple II	Dec 22, 2017
Assembly	Sep 3, 2017
Battle Chess	Dec 12, 2016
Chess 7.0	Jul 13, 2015
Chessmaster	Jan 21, 2018
Colossus Chess	Dec 10, 2017
Cyrus	Jul 22, 2014
Dan Spracklen	Jan 17, 2017
Denis Dancanet	Feb 6, 2018
Fidelity Electronics	Dec 1, 2017
Hardware	Jan 20, 2018
Intelligent Chess Software	Jan 8, 2016
International Computer Chess Tournament 1984	Dec 21, 2017
Kathe Spracklen	Dec 25, 2017
Larry Atkin	Jan 7, 2016
Lucien N. Dancanet	Feb 6, 2018
Mark Watson	Apr 14, 2013
Mark Watson Chess	Apr 14, 2013
Martin Bryant	Dec 11, 2016
MicroChess	Jul 14, 2015
MicroMurks	Jan 8, 2016
Mika Korhonen	Jan 7, 2016
Morphy	Dec 25, 2017
Nona	Jan 7, 2016
Pascal	Nov 28, 2016
Rebel	Feb 25, 2018
Rufus	Dec 26, 2016
Sargon	Dec 25, 2017
Terry Fredrick	Nov 21, 2012
Tumult	Feb 6, 2018
Ward Douglas Maurer	Sep 17, 2014
WCCC 1989	Dec 5, 2017
White Knight	Dec 12, 2016
Will Singleton	Mar 6, 2015

Up one Level

Arduino

GerdIsenberg — Wed, 21 Feb 2018 15:03:53 GMT

Home * Hardware * Arduino

		Arduino, (due to a legal dispute, since 2015 it is known as Genuino outside the United States ^[1]) a family of open-source hardware single-board microcontrollers based on the Atmel 8-bit AVR RISC chips ^[2] . An important aspect of the Arduino is the standard way that connectors are exposed, allowing the CPU board to be connected to a variety of interchangeable add-on modules known as shields ^[3] . Some shields communicate with the Arduino board directly over various pins, but many shields are individually addressable via an I²C serial bus, allowing many shields to be stacked and used in parallel ^[4] . This page focuses on two boards with concrete computer chess applications.
Arduino Mega ^[5]

Arduino Uno

The Arduino Uno is based on the 8-bit ATmega328 running at 16 MHz with 32 KiB ISP Flash memory with read-while-write capabilities, 1 KiB EEPROM, and 2 KiB SRAM. It has 14 digital input/output pins and six analog inputs and USB connection.

Arduino Mega

The 2009 released Arduino Mega uses the 8-bit ATmega1280 ^[6] , also running at 16 MHz, but with 128 KiB of Flash memory which 4 KiB used by bootloader, 8 KiB SRAM, and 4 KiB EEPROM. Arduino Mega has 54 digital input/output pins, 16 analog inputs, 4 UARTs, and USB connection. Its 2010 successor, the Arduino Mega 2560 ^[7] features the more advanced ATmega2560 ^[8] with 256 KiB Flash memory.

Development

Arduino provides an integrated development environment running on a host computer, supporting the C/C++ based Arduino language ^[9] . Software written using Arduino language are called sketches, and undergoes minor changes like automatic generation of function prototypes during the build process, and then passed directly to a C/C++ compiler. All standard C and C++ constructs supported by AVR-g++ should work in Arduino. Alternatively, one may compile programs for the Arduino using AVR development tools, which requires configuration to link against the appropriate files in the Arduino core libraries ^[10] .

Computer Chess

Arduino controllers are suitable to build a dedicated chess computer - to control a self-made sensory board ^[11], or even to run small chess programs.

Chess Programs

Micro-Max by Harm Geert Muller was aleady ported for the Atmel-ATmega88 by Andre Adrian ^[12] , and is also available as ATM18 mini chess computer ^[13] from the electronics magazine Elektor. Óscar Toledo Gutiérrez' program Toledo Nanochess seems appropriate for the Arduino boards as well ^[14] . Otherwise, for Uno and Mega, there are some more chess programs available, dedicated and emulated.

Little Rook Chess

Little Rook Chess by Oliver Kraus is a chess game for using the Arduino Uno with a dedicated user interface realized with an Electronic Assembly DOG LCD module ^[15] and button shield. Little Rook Chess is part of the u8glib library (Universal 8bit Graphics Library) ^[16] under the terms of the new bsd license ^[17].

MicroChess

Obsolescence Guaranteed ^[18] has ported the original 6502 MicroChess, wrapped in a 6502 emulator, to the Arduino ^[19]. A further development is the KIM Uno ^[20], a calculator-sized KIM-1 replica with MicroChess built in. Both projects are open source software/hardware using the MicroChess source code (which is available but not open source) with permission from Peter Jennings.

Myopic

Myopic by Steven Edwards is suited for the Arduino Mega, written in C++ and released under the Creative Commons license ^[21] .

myopic.tar
- Details
- Download
- 732 KB

Chess Robot

The Arduino Due Chess Robot is a self build sensory board with robot arm by Chris Quayle as a hobby project - powered by an Arduino Due and incorporating Micro-Max by Harm Geert Muller as chess AI.

Square Off

Square Off, the dedicated robot sensory board features an Arduino Mega with ATmega 2560 chip to control the piece moving two axis robotic arm, to detect piece movement, and to communicate with a smartphone via Bluetooth ^[22].

Analog Evaluation

Reading the 10-bit analog-to-digital converter, adequately supplied by a score voltage of a noisy analog leaf evaluation with some discrete analog circuits and op-amps takes about 100 microseconds and is likely too slow for that interesting application ^[23] .

Forum Posts

Arduino on Linux by erich, Arduino Forum, October 11, 2005
Chess for the Arduino by chessplayer, Arduino Forum, December 06, 2009 » Myopic
Myopic, a new Creative Commons chess program by Steven Edwards, CCC, May 22, 2010 » Myopic
Nanochess auf avr by Sam, Mikrocontroller.net GCC Forum, February 11, 2011 (German)
Re: Graphic LCD shield with EA DOGS102W display by Oliver Kraus, Arduino Forum, June 18, 2011
My Arduino-Based 6502 Simulation/Emulation...thing? by halkun, 6502.org Forum, November 26, 2012
KIM Uno: a KIM-1 emulator on an Arduino Uno by Oscar, Vintage Computer Forum, June 21, 2014
Poll: Arduino Uno Tournament by David Eather, CCC, August 15, 2014
Chess Mate Arduino chess computer via Hackaday by Steven Edwards, CCC, December 08, 2015 ^[24]
My chess robot project using Micromax chess on Arduino by Chris Quayle, CCC, August 06, 2017 » Arduino Due Chess Robot

External Links

Arduino

Computer Chess

Arduino & Raspberry PI Chess Computer running Stockfish on Raspberry Pi, by Max Dobres » Sensory Board
Little Rook Chess - Library for the Dogm-Graphics-LCD modules (AVR, Arduino compatible) - Google Project Hosting, by Oliver Kraus
chess.c - dogm128 - Library for the Dogm-Graphics-LCD modules (AVR, Arduino compatible) - Google Project Hosting
Use this Open Source Lib to play Chess with Arduino by Giorgos Lazaridis, PCB Heaven, October 14, 2014 » Micro-Max
Chessuino by Diego Cueva, based on Micro-Max by Harm Geert Muller, ported for the Atmel-ATmega88 by Andre Adrian
CHESSuino = Chess + Arduino, YouTube Video
Wireless Arduino Powered Chess, YouTube Video
Arduino Due Chess Robot by Chris Quayle » Arduino Due Chess Robot
Arduino Blog » Square Off is a chess board with a high-tech twist, October 17, 2016 » Square Off

Development

Assembly

C, C++

Java

Misc

References

^ Arduino from Wikipedia
^ Arduino - Getting Started
^ Arduino - Products
^ Arduino from Wikipedia
^ Image by David Mellis, July 12, 2010, hosted at Flickr, Arduino from Wikipedia
^ Atmel - ATmega1280
^ Arduino Mega 2560 Rev3
^ ATmega2560 - 8-bit AVR Microcontrollers
^ Arduino - Reference
^ Arduino - FAQ
^ Arduino & Raspberry PI Chess Computer running Stockfish on Raspberry Pi, by Max Dobres
^ Self-made Chess Computer SHAH based on an Atmel-ATmega88 Microcontroller and Micro-Max-port by Andre Adrian (German)
^ ATM18 Mini Chess Computer from ELEKTOR.com – Platform for electronics and microcontrollers
^ Nanochess auf avr by Sam, Mikrocontroller.net GCC Forum, February 11, 2011 (German)
^ ELECTRONIC ASSEMBLY : LCD DOG series, flexibe, flat and colorful
^ little_rook_chess · olikraus/u8glib Wiki · GitHub
^ u8glib/license.txt at master · olikraus/u8glib · GitHub
^ Obsolescence Guaranteed Home
^ 6502 Microchess on an Arduino
^ KIM Uno
^ Myopic, a new Creative Commons chess program by Steven Edwards, CCC, May 22, 2010
^ Arduino Blog » Square Off is a chess board with a high-tech twist, October 17, 2016
^ Arduino - AnalogRead
^ Chess Mate • Hackaday.io

What links here?

Page	Date Edited
6502	Dec 25, 2017
Analog Evaluation	Oct 27, 2017
Arduino	Feb 21, 2018
Dedicated Chess Computers	Feb 20, 2018
Hardware	Jan 20, 2018
KIM-1	Oct 9, 2014
Little Rook Chess	Sep 1, 2015
Max Dobres	Sep 21, 2016
Micro-Max	Aug 7, 2017
MicroChess	Jul 14, 2015
Myopic	Nov 11, 2016
Oliver Kraus	Oct 16, 2015
pcDuino	Sep 10, 2014
Raspberry Pi	Jun 7, 2017
Robots	Feb 20, 2018
Sensory Board	Mar 1, 2018
Square Off	Feb 21, 2018
Steven Edwards	Aug 26, 2017
Stockfish	Apr 7, 2018
UDOO	Oct 27, 2017
USB Chess Board	Apr 21, 2015

Up one Level

ARM2

GerdIsenberg — Fri, 16 Dec 2016 17:20:05 GMT

Home * Hardware * ARM2

ARM2, (ARM3)
the Acorn RISC Machine ARMv2 architecture is a 32-bit CMOS reduced instruction set computer, first released in 1987 ^[1] as successor of the initial ARM (1985), designed by Sophie Wilson and Steve Furber in 1984 ^[2]. It features a 32-bit data bus, a 26-bit address space and sixteen 32-bit registers (r0 - r15, including PC and SP) ^[3], and a 3-stage pipelined (Fetch, Decode, Execute) Von Neumann architecture. The ARM is a bi endian machine, per default little-endian.

Features

The ARM instruction set features three operand instructions, and conditional execution to avoid conditional branches. Some sample ARM assembly ^[4] :

  CMP    r0, r1           ; set flags
  ADDGE  r2, r2, r3       ; if (r0 >= r1) then r2 := r2 + r3;
  ADDLT  r2, r2, r4       ; else r2 := r2 + r4;

A 32-bit barrel shifter can be used without performance penalty with most arithmetic instructions and address calculations:

  ADD  r2, r3, r3, lsl #2 ; r2 := r3 + (r3 << 2)
                          ; → r2 := r3 + r3 * 4
                          ; → r2 := r3 * 5

Computer Chess

The ARM2 processor was embedded inside the TASC ChessMachine plugged in as ISA card inside an IBM PC, running Gideon and The King ^[5], and was further used in various dedicated dedicated chess computers by Hegener & Glaser ^[6] ^[7].

Manuals

Postings

Some facts about the Acorn RISC Machine by Roger Wilson, comp.arch, November 02, 1988
StrongARM speed of Streater program (was Re: M-Chess Pro 6.0 program description) by Stephen B. Streater, rgcc, October 21, 1996 » reply to Ed Schröder on ARM2 vs. StrongARM

External Links

References

^ Some facts about the Acorn RISC Machine by Roger Wilson, comp.arch, November 02, 1988
^ Sophie Wilson - 2012 Fellow from The Computer History Museum
^ ARM Assembly Language Programming - Chapter 2 - Inside the ARM
^ Samples from ARM-Architektur - Besonderheiten des Befehlssatzes | Wikipedia.de (German)
^ TASC ChessMachine from Schachcomputer.info Wiki
^ Mephisto Risc 1MB from Schachcomputer.info Wiki
^ Mephisto Risc 2 from Schachcomputer.info Wiki

What links here?

Page	Date Edited
1st Computer Olympiad	Jul 25, 2017
2nd Computer Olympiad	Jul 12, 2017
3rd Computer Olympiad	Jul 25, 2017
4th Computer Olympiad	Jul 15, 2017
ACM 1991	Nov 25, 2017
ACM 1993	Oct 30, 2017
Acorn Archimedes	Dec 17, 2016
ARM2	Dec 16, 2016
ARM6	Jan 26, 2015
Assembly	Sep 3, 2017
BBC Micro	Dec 16, 2016
ChessMachine	Feb 26, 2018
Chessmate	Dec 12, 2016
DOCCC 1992	Dec 12, 2016
DOCCC 1993	Dec 12, 2016
E6P	Dec 17, 2016
Gideon	Feb 26, 2018
Hardware	Jan 20, 2018
Johan de Koning	Jul 3, 2017
Knowledge	Jul 22, 2017
Mephisto Risc	Sep 1, 2017
Mephisto Vancouver	Sep 2, 2017
Rebel	Feb 25, 2018
Stephen B. Streater	Dec 17, 2016
Tasc	Sep 7, 2017
The King	Jan 21, 2018
WCCC 1992	Feb 26, 2018
WMCCC 1990	Oct 27, 2016
WMCCC 1991	Sep 18, 2016

Up one Level

ARM6

GerdIsenberg — Mon, 26 Jan 2015 14:28:33 GMT

Home * Hardware * ARM6

		ARM6, (ARM610, ARM7) a family of 32-bit RISC processors of the ARMv3 architecture released in early 1992 by Advanced RISC Machines Ltd, a company structured as a joint venture between Acorn Computers Ltd, Apple and VLSI Technology, which became ARM Ltd when its parent company, ARM Holdings, floated on the London Stock Exchange and NASDAQ in 1998 ^[1]. The ARM6 is instruction compatible to Acorn's ARM2, has a full 32-bit address bus, requiring an extra PSR register. The differences between ARM6 and the later ARM7 are that the latter has a hardware debug capability, the Thumb instruction set to support both 16-bit and 32-bit instruction formats and an enhanced multiplier ^[2]. The ARM6 and successors were used in various Dedicated Chess Computers, notably the RISC 2500, Mephisto Montreux, Tasc R30 and Tasc R40.
ARM610 die ^[3]

Manuals

Publications

Anthony Fox (2003). Formal Specification and Verification of ARM6. LNCS, Vol. 2758, Theorem Proving in Higher Order Logics, Springer ^[4]
Michael J. C. Gordon (2004). Formal Specification and Verification of ARM6. Computer Laboratory, University of Cambridge, Final Report as pdf

External Links

References

^ Apple, DEC, Intel, Marvell: ARM6, StrongARM, XScale - Wikipedia
^ Michael J. C. Gordon (2004). Formal Specification and Verification of ARM6. Computer Laboratory, University of Cambridge, Final Report as pdf
^ Die shot of ARM610 microprocessor made by GEC Plessey Semiconductors, Photo by Pauli Rautakorpi, June 13, 2014
^ HOL (proof assistant) from Wikipedia

What links here?

Page	Date Edited
ARM2	Dec 16, 2016
ARM6	Jan 26, 2015
Hardware	Jan 20, 2018
Mephisto Montreux	Jan 8, 2016
RISC 2500	Jan 7, 2016
Tasc R30	Sep 7, 2017
Tasc R40	Sep 7, 2017
The King	Jan 21, 2018
WMCCC 1993	Dec 30, 2017
WMCCC 1995	Jan 3, 2018

Up one Level

Atari 8-bit

GerdIsenberg — Wed, 03 Aug 2016 13:51:48 GMT

Home * Hardware * Atari 8-bit

		The Atari 8-bit was a series of home computers based on the 6502 processor with custom coprocessor chips, manufactured by Atari Corporation from 1979 to 1992.
Atari 800 ^[1]

Chess Programs

Publications

Tekla E. Perry, Paul Wallich (1983). Design case history: the Atari Video Computer System. IEEE Spectrum, March 1983

External Links

References

^ Atari 800 8-bit home computer. Photo by Bilby, July 21, 2010, CC BY 3.0, Atari 8-bit family from Wikipedia
^ Atari 400 800 XL XE Sargon III
^ HuguesJohnson.com: Atari Catalog 1981 Scans

What links here?

Page	Date Edited
6502	Dec 25, 2017
Artic Computing	Aug 13, 2016
Atari 8-bit	Aug 3, 2016
Chess 7.0	Jul 13, 2015
Chessmaster	Jan 21, 2018
Colossus Chess	Dec 10, 2017
Computer Chess	Apr 5, 2016
Ed English	Jun 30, 2013
Hardware	Jan 20, 2018
John F. White	Dec 11, 2013
Larry Atkin	Jan 7, 2016
Larry Wagner	Dec 22, 2017
Master Chess	Aug 3, 2016
Morphy	Dec 25, 2017
Parker Chess	Jun 30, 2013
Pseudorandom number generator	May 11, 2017
Querg	Dec 11, 2013
Reinforcement Learning	Feb 12, 2018
Sargon	Dec 25, 2017
Video Chess	Dec 23, 2017
ZX Spectrum Chess	Aug 3, 2016

Up one Level

Atari ST

GerdIsenberg — Wed, 07 Dec 2016 12:53:13 GMT

Home * Hardware * Atari ST

		The Atari ST was a personal computer released by Atari Corporation in 1985 and commercially available until the early 90s. The "ST" officially stands for "Sixteen/Thirty-two" ^[1] , which referred to the Motorola 68000's 16-bit and 32-bit external and internal buses.
Atari ST ^[2]

Chess Programs

Chessmaster 2000 by David Kittinger
Chess Player 2150 by Chris Whittington
^[3]
Colossus Chess by Martin Bryant ^[4]
Fritz by Frans Morsch and Mathias Feist as part of ChessBase 4.0
Psion by Richard Lang ^[5] ^[6]
^[7]
Sargon III by Dan and Kathe Spracklen
^[8]
TechMate by Szabo Software (Alexander Szabo & Barbara Szabo) ^[9] ^[10]
^[11] ^[12]
Xchess by Bert van der Liet
^[13]

Publications

Christopher Chabris (1987). Reviews: The Game of Kings - START's First Chess Tournament. STart Vol. 2, No. 2

Forum Posts

Re: La Máquina Preservadora. Programas de Ajedrez by Luis a, Meca Foro, May 13, 2013 (Spanish)

External Links

References

What links here?

Page	Date Edited
1st Computer Olympiad	Jul 25, 2017
2nd Computer Olympiad	Jul 12, 2017
68000	Jun 7, 2016
Alexander Szabo	Nov 10, 2012
Atari 8-bit	Aug 3, 2016
Atari ST	Dec 7, 2016
Attila Kovács	Jan 7, 2016
Barbara Szabo	Nov 10, 2012
Battle Chess	Dec 12, 2016
Bernhard Walter	Dec 31, 2015
Bernie	Oct 31, 2015
Bobby	Jan 7, 2016
Chess Player 2150	Jan 1, 2017
Chess Simulator	Dec 7, 2016
ChessBase	Nov 25, 2017
ChessBase (Database)	Feb 26, 2018
Chessmaster	Jan 21, 2018
Christopher Chabris	Aug 15, 2015
Colossus Chess	Dec 10, 2017
Dieter Bürssner	Dec 1, 2016
DOCCC 1985	Dec 9, 2016
DOCCC 1986	Dec 9, 2016
DOCCC 1987	Dec 9, 2016
DOCCC 1993	Dec 12, 2016
Doctor?	Jun 7, 2016
Frederic Friedel	Jan 6, 2018
Graphics Programming	Dec 22, 2017
Hans Zellner	Jun 12, 2016
Harald Lüßen	Mar 20, 2013
Hardware	Jan 20, 2018
Herbert Marquardt	Nov 25, 2014
IPCCC 1991	Jun 9, 2016
Kempelen	Mar 24, 2016
Mark Boon	Dec 15, 2016
Mathias Feist	Aug 27, 2016
NICBase	Jul 16, 2017
Psion	Mar 20, 2017
Rasmus Althoff	Jul 23, 2017
Richard Lang	Jan 7, 2016
Sargon	Dec 25, 2017
SCHK-Y	Sep 9, 2015
Surprise	Sep 20, 2016
Sven Schüle	Sep 20, 2016
Szabo Software	May 3, 2013
TechMate	Aug 23, 2014
Volker Annuss	Aug 3, 2017
WCCC 1986	Jul 27, 2017
WMCCC 1987	Jan 7, 2016
XChess	Sep 9, 2015

Up one Level

BBC Micro

GerdIsenberg — Fri, 16 Dec 2016 21:39:49 GMT

Home * Hardware * BBC Micro

		BBC Micro, (BBC Microcomputer System) a series of 8-bit 6502 based home computers by Acorn Computers Ltd, initially designed by a team including Steve Furber and Sophie Wilson, first released in December 1981. The Micro was contracted by the British Broadcasting Corporation (BBC) after a call for bids for a computer to accompany the TV series and literature for their Computer Literacy Project ^[1] ^[2] ^[3], which was won by Acorn with the Proton, a successor of the Acorn Atom - renamed the BBC Micro. Acorn also employed the machine to simulate and develop the ARM architecture which, many years later, has become hugely successful ^[4].
BBC Micro ^[5]

First Computer Go Tournament

Computer Literacy Project

Misc

References

What links here?

Hardware

The BBC Micro had a 6502 processor running at full 2 MHz speed, accessing fast DRAM, alternating concurrently with the MC6845 video display controller, featuring eight display modes for text and graphics varied between 20 and 40-column text suitable for a TV, to 80-column text requiring an RGB-connected video monitor. As noted by Steve Furber in a recent interview ^[6], the alternating fast 4 MHz RAM access required some address multiplexing using exactly the 81LS95 tri-state octal buffer ^[7] from National Semiconductor - for unknown reasons, 81LS95 from other vendors were not working.

Multiple input/output ports were available to connect with peripherals or other machines, such as serial PS-423 ports, parallel ports, analogue input ports with ADC for instance used by a joystick, light pen input, an expansion connector (the "1 MHz bus") to expand the system with additional hardware such as the BBC Micro expansion, and the Tube interface to connect a secondary processor. The BBC Micro had an integrated keyboard and a cassette interface. Floppy disks were optional through the Intel 8271 programmable floppy disk controller, in later models replaced by Western Digital's FD1771. The Texas Instruments SN76489 was responsible for sound. Phoneme based speech synthesis using TI's TMS5220 speech chip with a custom Acorn ROM of Kenneth Kendall's voice was optional ^[8].

Models

The initial BBC Micro was shipped as Model A with 16 KiB of user RAM, and Model B with 32 KiB. The Acorn Electron was a budget version of the B-Model released by Acorn in 1983. Two export models were developed for the US ^[9] and West Germany in 1983 ^[10]. As a sideline, the Acorn Business Computer (ABC) range of machines was announced in October 1984 ^[11].

The Model B+ in mid 1985, increased the total RAM to 64 KiB, the B+128 came with an additional 64 KiB (4 × 16 KBi "Sideways" RAM banks) to give a total RAM of 128 KiB ^[12]. The BBC Master with integrated floppies followed in 1986 with an enhanced 65SC12 CPU, and expandable 128 KiB RAM as default, and remained in production until 1993 ^[13].

Software

The Acorn Machine Operating System (MOS) was held in 16 KiB of ROM on the motherboard. A further 16 KiB ROM contained the BBC BASIC interpreter. Acornsoft was the major publisher of software for the BBC Micro and Acorn Electron, who released Acornsoft Chess written by Arthur Norman and Nick Pelling. Other British companies in the fast growing software market were Micro Power , Computer Concepts, Ltd. and Bug-Byte.

Chess Programs

First Computer Go Tournament

The BBC Micro Go Tournament was held in London, on January 7 and 8, 1984, sponsored by Acornsoft. All eight programs ran on BBC Micro. The Go playing program by Bronyslaw Przybla won the event ^[14].

Publications

John Vaux (1983). Micro takes on Chess Machine. Acorn User, No. 8, pdf
Tony Harrington (1983). University Challenge - Martin Bryant and White Knight. Personal Computer World, August 1983, pdf hosted by Mike Watters
Alex Bell (1983). Chess for three gives the White Knight a winning gambit. The Micro User Magazine, December 1983
Arthur Norman, Gillian Cattell (1983). LISP on the BBC Microcomputer. Acornsoft » LISP ^[16]

Manuals

^[17]

John Coll, David Allen (ed.) (1984). BBC Microcomputer System User Guide. pdf
Acorn Computer (1985). BBC Microcomputer Service Manual. Section 1, Models A + B, pdf
Circuit Diagram (pdf)

Forum Posts

Okay, i know now: Colossus and BBC ACORN A: White Knight by Frank Phillips, CCC, May 06, 2002
those good old times... in the 70-80ties by Thorsten Czub, CCC, May 06, 2002

External Links

BBC Micro

Software

Chess Programs

Computer Literacy Project

Misc

Computer Go - Past Events - Acorn 1984 » Go
Building the BBC Micro (The Beeb) with Steve Furber - Computerphile, YouTube Video
The BBC Model B Microcomputer System: As seen in Tezza's classic computer collection, YouTube Video

References

^ BBC - Computer Literacy Project - Computing History
^ BBC Continuing Education Television - Computer Literacy Project (pdf)
^ The Computer Programme (BBC2, 1982), YouTube Videos
^ BBC Micro from Wikipedia
^ Image assumed by Stuart Brady, December 26, 2005, The expansion socket to the left of the keyboard is not a standard fitting and has been added afterwards, Wikimedia Commons
^ Steve Furber's Video Interview at 8:50
^ DM81LS95A Datasheet - National Semiconductor
^ BBC Micro from Wikipedia
^ USA model BBC micro
^ Chris's Acorns: German BBC Microcomputer Model B, hosted by the Wayback Machine
^ BBC Micro from Wikipedia
^ BBC Micro from Wikipedia
^ Acorn Sales News Issue 72 (pdf) April 19, 1993
^ Computer Go - Past Events - Acorn 1984
^ Micro Bit from Wikipedia
^ Acornsoft LISP from Wikipedia
^ Chris's Acorns: Acorn Manuals

What links here?

Page	Date Edited
Acorn Archimedes	Dec 17, 2016
Acorn Atom	Dec 11, 2016
Acornsoft Chess	Dec 11, 2016
Arthur Norman	Dec 16, 2016
Artic Computing	Aug 13, 2016
Basic	Jan 3, 2018
BBC Micro	Dec 16, 2016
Chess (David Thompson)	Dec 11, 2016
Colossus Chess	Dec 10, 2017
Go	Jan 24, 2018
Hardware	Jan 20, 2018
Martin Bryant	Dec 11, 2016
Michael Reiss	Dec 15, 2016
Nick Pelling	Dec 11, 2016
White Knight	Dec 12, 2016
Your Computer	Dec 10, 2016

Up one Level

Wikispaces : chessprogramming - items matching description

6502

Table of Contents

Register Files

Endianess

Quotes

Architecture

TK20

See also

Manuals

Selected Publications

Forum Posts

External Links

References

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6800

Table of Contents

Architecture

See also

Manuals

External Links

6800

6800 Controller

References

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68000

Table of Contents

See also

Publications

External Links

References

What links here?

68020

See also

Publications

External Links

References

What links here?

8080

Table of Contents

Architecture

Register Files

Successors

Endianess

Software

Operating Systems

Development

Chess Programs

See also

Publications

External Links

References

What links here?

8086

Table of Contents

Registers

Segmentation

Pointer

Memory models

Clones

Publications

External Links

References

What links here?

Acorn Archimedes

Table of Contents

Models

ARM Development

Chess Programs

See also

Manuals

External Links

Acorn Archimedes

Software

Chess Programs

Archimedes

References

What links here?

Acorn Atom

Table of Contents